公开(公告)号：US20230176097A1

公开(公告)日：2023-06-08

申请号：US17643052

申请日：2021-12-07

Applicant: NXP B.V.

Inventor： Ricardo Pureza Coimbra ,  Edevaldo Pereira da Silva, JR. ,  Felipe Ricardo Clayton

IPC: G01R19/257 ,  H03M1/12

CPC classification number: G01R19/257 ,  H03M1/1245

Abstract: An integrated circuit includes an analog-to-digital converter (ADC) configured to receive input voltage, and first and second reference voltages, and outputs digital code representing ratios between the input voltage and the first and the second reference voltages. The first and second reference voltages are generated by a reference generator using different current densities. During a first stage, the ADC samples the first input voltage and the first reference voltage and transfers equivalent charge of the sampled first input voltage and first reference voltage to an integration capacitor. During a second stage, the ADC samples the second reference voltage and transfers equivalent charge of the sampled second reference voltage to the integration capacitor. The ADC provides one bit of digital code based on total charge stored on the integration capacitor after the transfers of charge of the sampled input voltage, and the sampled first and second reference voltages.

公开(公告)号：US11733277B2

公开(公告)日：2023-08-22

申请号：US17643052

申请日：2021-12-07

Applicant: NXP B.V.

Inventor： Ricardo Pureza Coimbra ,  Edevaldo Pereira da Silva, Jr. ,  Felipe Ricardo Clayton

IPC: H03M1/12 ,  G01R19/257

CPC classification number: G01R19/257 ,  H03M1/1245

Abstract: An integrated circuit includes an analog-to-digital converter (ADC) configured to receive input voltage, and first and second reference voltages, and outputs digital code representing ratios between the input voltage and the first and the second reference voltages. The first and second reference voltages are generated by a reference generator using different current densities. During a first stage, the ADC samples the first input voltage and the first reference voltage and transfers equivalent charge of the sampled first input voltage and first reference voltage to an integration capacitor. During a second stage, the ADC samples the second reference voltage and transfers equivalent charge of the sampled second reference voltage to the integration capacitor. The ADC provides one bit of digital code based on total charge stored on the integration capacitor after the transfers of charge of the sampled input voltage, and the sampled first and second reference voltages.