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公开(公告)号:US12261691B2
公开(公告)日:2025-03-25
申请号:US18317494
申请日:2023-05-15
Applicant: NXP B.V.
Inventor: Loic Leconte , Mark Norman Fullerton , Mathieu Blazy-Winning
Abstract: A system-on-chip (SoC) method and apparatus are disclosed for checking end-to-end integrity of communications over an network interconnect, where the SoC includes an initiator subsystem connected over the network interconnect to a target subsystem, wherein a first integrity module is configured to compute a first integrity value based on regular transaction messages sent or received by the initiator subsystem and to send a protecting information transaction (PIT) message over the network interconnect to the target subsystem, wherein a second integrity module is configured to compute a second integrity value based on regular transaction messages sent or received by the destination subsystem and to send a PIT response message over the network interconnect to the initiator subsystem, and wherein a compatibility module compares the first and second integrity values to verify the end-to-end integrity of the regular transaction messages sent or received over the network interconnect.
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公开(公告)号:US20240020186A1
公开(公告)日:2024-01-18
申请号:US18348403
申请日:2023-07-07
Applicant: NXP B.V.
Inventor: Xiankun Jin , Andres Barrilado Gonzalez , Mathieu Blazy-Winning
CPC classification number: G06F11/008 , G06F11/324
Abstract: A layered architecture for managing health of the electronic system comprises a plurality of health subsystems. Health subsystems receive health information from health monitors coupled to respective components of the electronic system and provide the health information to another health subsystem. Based on the received health information, the other health subsystem uses predictive data analytics to determine a health condition of the electronic system and update a health policy based on the predictive data analytics to improve prediction of the health condition of the electronic system.
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公开(公告)号:US20240070018A1
公开(公告)日:2024-02-29
申请号:US18317494
申请日:2023-05-15
Applicant: NXP B.V.
Inventor: Loic Leconte , Mark Norman Fullerton , Mathieu Blazy-Winning
CPC classification number: G06F11/1048 , G06F13/4004 , G06F15/7825
Abstract: A system-on-chip (SoC) method and apparatus are disclosed for checking end-to-end integrity of communications over an network interconnect, where the SoC includes an initiator subsystem connected over the network interconnect to a target subsystem, wherein a first integrity module is configured to compute a first integrity value based on regular transaction messages sent or received by the initiator subsystem and to send a protecting information transaction (PIT) message over the network interconnect to the target subsystem, wherein a second integrity module is configured to compute a second integrity value based on regular transaction messages sent or received by the destination subsystem and to send a PIT response message over the network interconnect to the initiator subsystem, and wherein a compatibility module compares the first and second integrity values to verify the end-to-end integrity of the regular transaction messages sent or received over the network interconnect.
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