公开(公告)号：US20200343368A1

公开(公告)日：2020-10-29

申请号：US16848195

申请日：2020-04-14

Applicant: NXP B.V.

Inventor： Viet Dinh ,  Guido Sasse ,  Paul Grudowski

IPC: H01L29/66 ,  H01L21/8238

Abstract: A semiconductor device is disclosed, a substrate structure; a raised source region; a raised drain region; a separation region disposed laterally between the raised source region and the raised drain region; a gate structure, disposed between the raised source region and the raised drain region and above a part of the separation region, the gate structure being spaced apart from the drain region and defining a drain extension region therebetween; a dummy gate structure in the drain extension region; an epitaxial layer, disposed above and in contact with the substrate structure and forming the raised source region, the raised drain region, and a raised region between the gate structure and the dummy gate structure, wherein the raised region between the gate structure and the dummy gate structure is relatively lightly doped to a conductivity of a second conductivity type which is opposite the first conductivity type.

公开(公告)号：US11222961B2

公开(公告)日：2022-01-11

申请号：US16848195

申请日：2020-04-14

Applicant: NXP B.V.

Inventor： Viet Dinh ,  Guido Sasse ,  Paul Grudowski

IPC: H01L29/772 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78

Abstract: A semiconductor device is disclosed, a substrate structure; a raised source region; a raised drain region; a separation region disposed laterally between the raised source region and the raised drain region; a gate structure, disposed between the raised source region and the raised drain region and above a part of the separation region, the gate structure being spaced apart from the drain region and defining a drain extension region therebetween; a dummy gate structure in the drain extension region; an epitaxial layer, disposed above and in contact with the substrate structure and forming the raised source region, the raised drain region, and a raised region between the gate structure and the dummy gate structure, wherein the raised region between the gate structure and the dummy gate structure is relatively lightly doped to a conductivity of a second conductivity type which is opposite the first conductivity type.