FEEDBACK SYSTEM MONITORING
    1.
    发明申请

    公开(公告)号:US20220187423A1

    公开(公告)日:2022-06-16

    申请号:US17451567

    申请日:2021-10-20

    Applicant: NXP B.V.

    Abstract: The disclosure relates to monitoring of feedback systems such as phase lock loops. A system is disclosed, comprising: a feedback circuit (100); and a monitoring module (190). The monitoring module (190) is configured to: i) receive actual values of at least one state variable describing the state of the feedback circuit at a first time; ii) determine a predicted future value of the at least one state variable at a second time from the actual values at the first time using a model of the feedback circuit; iii) receive actual values of the at least one state variable at the second time; iv) compare the predicted future value of the at least one state variable at the second time with the actual value of the at least one state variable at the second time; and v) determine whether the feedback circuit has a fault condition, depending on the results of step iv).

    Feedback system monitoring
    2.
    发明授权

    公开(公告)号:US12063045B2

    公开(公告)日:2024-08-13

    申请号:US17451567

    申请日:2021-10-20

    Applicant: NXP B.V.

    CPC classification number: H03L7/0991 H03L7/093

    Abstract: The disclosure relates to monitoring of feedback systems such as phase lock loops. A system is disclosed, comprising: a feedback circuit (100); and a monitoring module (190). The monitoring module (190) is configured to: i) receive actual values of at least one state variable describing the state of the feedback circuit at a first time; ii) determine a predicted future value of the at least one state variable at a second time from the actual values at the first time using a model of the feedback circuit; iii) receive actual values of the at least one state variable at the second time; iv) compare the predicted future value of the at least one state variable at the second time with the actual value of the at least one state variable at the second time; and v) determine whether the feedback circuit has a fault condition, depending on the results of step iv).

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