摘要:
A memory system includes: a memory controller including an error correction decoder. The error correction decoder includes: a demultiplexer adapted to receive data and demultiplex the data into a first set of data and a second set of data; first and second buffer memories for storing the first and second sets of data, respectively; an error detector; an error corrector; and a multiplexer adapted to multiplex the first set of data and the second set of data and to provide the multiplexed data to the error corrector. While the error corrector corrects errors in the first set of data, the error detector detects errors in the second set of data stored in the second buffer memory.
摘要:
A method of operating a data compression device includes analyzing data using an analyzer and generating a result of the analysis, while the data is buffered by an input buffer, and selectively compressing the buffered data according to the result of the analysis. A data compression device includes a data pattern analyzer configured to analyze data transmitted to an input buffer, and generate an analysis code based on the analysis of the data; and a data compression manager configured to selectively compress the data in the input buffer based on the analysis code.
摘要:
A method of operating a data compression device includes analyzing data using an analyzer and generating a result of the analysis, while the data is buffered by an input buffer, and selectively compressing the buffered data according to the result of the analysis. A data compression device includes a data pattern analyzer configured to analyze data transmitted to an input buffer, and generate an analysis code based on the analysis of the data; and a data compression manager configured to selectively compress the data in the input buffer based on the analysis code.
摘要:
A method of operating a data compression device includes analyzing data using an analyzer and generating a result of the analysis, while the data is buffered by an input buffer, and selectively compressing the buffered data according to the result of the analysis. A data compression device includes a data pattern analyzer configured to analyze data transmitted to an input buffer, and generate an analysis code based on the analysis of the data; and a data compression manager configured to selectively compress the data in the input buffer based on the analysis code.
摘要:
The present invention relates to a decoding device and method for a MIMO system. A linear process is applied to a received signal vector by using a channel matrix estimated from the received signal vector and a poly-diagonalized matrix, and a soft decision value is acquired through a trellis decode by using the linear process result. Since the linear preprocess is performed by using the poly-diagonalized matrix, it is possible to receive a MIMO signal having good packet error rate performance and less complexity. Also, since the tail-biting trellis decoding method is used based on the poly-diagonalized matrix that is generated by poly-diagonalizing the effective channel matrix during the process for eliminating the signal interference, the soft decision value for the symbol can be generated with a simple hardwired device and less operation complexity.
摘要:
The present invention relates to a decoding device and method for a MIMO system. A linear process is applied to a received signal vector by using a channel matrix estimated from the received signal vector and a poly-diagonalized matrix, and a soft decision value is acquired through a trellis decode by using the linear process result. Since the linear preprocess is performed by using the poly-diagonalized matrix, it is possible to receive a MIMO signal having good packet error rate performance and less complexity. Also, since the tail-biting trellis decoding method is used based on the poly-diagonalized matrix that is generated by poly-diagonalizing the effective channel matrix during the process for eliminating the signal interference, the soft decision value for the symbol can be generated with a simple hardwired device and less operation complexity.
摘要:
A scale-out device to control a group of non-volatile memory devices from among a plurality of non-volatile memory devices at a data storage device, includes a buffer and a scale-out controller. The buffer is configured to store address mapping information for the group of non-volatile memory devices, the group of non-volatile memory devices being a portion of the plurality of non-volatile memory devices at the data storage device. The scale-out controller is configured to control operation of only the group of non-volatile memory devices according to the address mapping information stored at the buffer.