摘要:
The invention relates to a phase-locked loop delivering a recovered clock signal from a reference clock signal F.sub.ref in which some transitions are missing. The loop includes a first divide-by-M frequency divider receiving the clock F.sub.ref and delivering a signal of frequency F.sub.ref /M; a phase comparator providing a phase error signal from the signal of frequency F.sub.ref /M, and the output signal from a second divide-by-M frequency divider; a divide-by-K frequency divider providing a signal of frequency F.sub.k from a local oscillator signal of frequency F.sub.oL receiving the phase error signal as a control signal; an adder-counter of the division ratio p/q receiving the local oscillator signal of frequency F.sub.oL and delivering a signal of frequency F.sub.o equal to F.sub.oL *p/q; a mixer delivering a signal of frequency F.sub.n equal to F.sub.o -F.sub.k on the basis of signal of frequency F.sub.k and the signal of frequency F.sub.o ; and a divide-by-N frequency divider synchronized by F.sub.oL, receiving the signal of frequency F.sub.n, and delivering a recovered clock to the second divide-by-M frequency divider.
摘要:
A method of inserting a service channel in frames that are plesiochronous relative to the service channel, the method including the steps of transmitting a block clock between a transmitter and a receiver of the frame, and reserving at the transmitter at least one location in the frames for the purpose of conveying the service channel data. The method further includes the steps of: inserting blocks (B) of the service channel into the reserved location causing each of the blocks (B) to be preceded by a predetermined number n1 of identical bits (D) referred to as “start” bits, and to do so in compliance with the following rules: in the event of there being no need to pad out the remainder of the location, repeating the method from the inserting step for a new block (B); in the event of it being necessary to pad out the remainder of the location, causing each of the blocks (B) to be followed by a number n2 of identical bits (F) referred to as “stop” bits, the “stop” bits (F) being different from the start bits (D), and repeating the method from the inserting step for a new block (B); and at the receiver: detecting the regular arrival of the start bits (D) or the regular arrival of the start bits (D) preceded by the stop bits (F), so as to be able to decide that the blocks (B) are present in the reserved locations and to extract the blocks (B) from the reserved locations.