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公开(公告)号:US20220310476A1
公开(公告)日:2022-09-29
申请号:US17738989
申请日:2022-05-06
Applicant: Navitas Semiconductor Limited
Inventor: Charles Bailley , George Chu , Daniel M. Kinzer
IPC: H01L23/367 , H01L21/48 , H01L25/00 , H01L25/07
Abstract: An electronic device includes a substrate and a first gallium nitride (GaN) transistor formed on a first semiconductor die that is electrically coupled to the substrate. A second GaN transistor is formed on a second semiconductor die and is also electrically coupled to the substrate. An integral heat spreader is thermally coupled to the first and the second gallium nitride semiconductor dies and is electrically coupled to the substrate. A first bias voltage is applied to the first GaN transistor via the integral heat spreader and a second bias voltage is applied to the second GaN transistor via the integral heat spreader.
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公开(公告)号:US12199004B2
公开(公告)日:2025-01-14
申请号:US17702694
申请日:2022-03-23
Applicant: Navitas Semiconductor Limited
Inventor: Charles Bailley , George Chu , Daniel M. Kinzer
IPC: H01L23/367 , H01L21/48 , H01L25/00 , H01L25/07 , H01L23/498 , H01L23/538
Abstract: An electronic device includes a substrate and a first gallium nitride (GaN) transistor formed on a first semiconductor die that is electrically coupled to the substrate. A second GaN transistor is formed on a second semiconductor die and is also electrically coupled to the substrate. An integral heat spreader is thermally coupled to the first and the second gallium nitride semiconductor dies and is electrically coupled to the substrate. A first bias voltage is applied to the first GaN transistor via the integral heat spreader and a second bias voltage is applied to the second GaN transistor via the integral heat spreader.
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公开(公告)号:US20230013188A1
公开(公告)日:2023-01-19
申请号:US17812385
申请日:2022-07-13
Applicant: Navitas Semiconductor Limited
Inventor: George Chu , Nick Fichtenbaum , Kai-Ling Chiu , Daniel M. Kinzer , Maher Hamdan , Pil Sung Park
IPC: H01L21/78 , H01L23/522
Abstract: Structures and related techniques for singulating GaN-on-Si wafers are disclosed. In one aspect, a semiconductor wafer includes a silicon layer, and a gallium nitride (GaN) layer disposed on the silicon layer and defining a plurality of trenches that each extend to the silicon layer. In another aspect, the GaN layer includes one or more gallium nitride layers of different compositions. In yet another aspect, the wafer includes a plurality of dielectric layers disposed on the GaN layer. In yet another aspect, each of the plurality of trenches has a depth that is equal to a sum of a thickness of the GaN layer and a thickness of the plurality of the dielectric layers.
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公开(公告)号:US12243799B2
公开(公告)日:2025-03-04
申请号:US17738989
申请日:2022-05-06
Applicant: Navitas Semiconductor Limited
Inventor: Charles Bailley , George Chu , Daniel M. Kinzer
IPC: H01L25/00 , H01L21/48 , H01L23/367 , H01L25/07 , H01L23/498 , H01L23/538
Abstract: An electronic device includes a substrate and a first gallium nitride (GaN) transistor formed on a first semiconductor die that is electrically coupled to the substrate. A second GaN transistor is formed on a second semiconductor die and is also electrically coupled to the substrate. An integral heat spreader is thermally coupled to the first and the second gallium nitride semiconductor dies and is electrically coupled to the substrate. A first bias voltage is applied to the first GaN transistor via the integral heat spreader and a second bias voltage is applied to the second GaN transistor via the integral heat spreader.
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公开(公告)号:US20220310475A1
公开(公告)日:2022-09-29
申请号:US17702694
申请日:2022-03-23
Applicant: Navitas Semiconductor Limited
Inventor: Charles Bailley , George Chu , Daniel M. Kinzer
IPC: H01L23/367 , H01L25/07 , H01L21/48 , H01L25/00
Abstract: An electronic device includes a substrate and a first gallium nitride (GaN) transistor formed on a first semiconductor die that is electrically coupled to the substrate. A second GaN transistor is formed on a second semiconductor die and is also electrically coupled to the substrate. An integral heat spreader is thermally coupled to the first and the second gallium nitride semiconductor dies and is electrically coupled to the substrate. A first bias voltage is applied to the first GaN transistor via the integral heat spreader and a second bias voltage is applied to the second GaN transistor via the integral heat spreader.
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