HARDWARE-IMPLEMENTED HANDLING OF BACK-TO-BACK AND PARALLEL TIME SLICES IN A VIDEO BROADCASTING RECEIVER
    1.
    发明申请
    HARDWARE-IMPLEMENTED HANDLING OF BACK-TO-BACK AND PARALLEL TIME SLICES IN A VIDEO BROADCASTING RECEIVER 审中-公开
    硬件实现在视频广播接收机中的背靠背和并行时间片的实现处理

    公开(公告)号:US20090007207A1

    公开(公告)日:2009-01-01

    申请号:US12040650

    申请日:2008-02-29

    IPC分类号: H04J3/00 H04N5/44

    摘要: A hardware-implemented video broadcasting receiver is described that is capable handling back-to-back and parallel time slices in an efficient manner, thereby providing improved receiver performance. In one implementation, the hardware-implemented video broadcasting receiver is capable of handling back-to-back time slices of up to 2 Megabits (Mbits) each and, depending upon the MPE-FEC frame size associated with each time slice, up to 8 parallel time slices or up to 4 parallel time slices transmitted back-to-back with 4 other parallel time slices. The hardware-implemented video broadcasting receiver advantageously permits more efficient and flexible use of the available spectrum and increases interoperability with other DVB-H compliant equipment.

    摘要翻译: 描述了能够以有效的方式处理背靠背和并行时间片的硬件实现的视频广播接收机,从而提供改进的接收机性能。 在一个实现中,硬件实现的视频广播接收机能够处理每个高达2兆比特(Mbits)的背对背时间片,并且根据与每个时间片相关联的MPE-FEC帧大小最多8 平行的时间片或最多4个并行时间片,其中四个并行时间片背对背传播。 硬件实现的视频广播接收器有利地允许更有效和灵活地使用可用频谱,并增加与其他符合DVB-H标准的设备的互操作性。

    HARDWARE-IMPLEMENTED VIDEO BROADCASTING RECEIVER
    2.
    发明申请
    HARDWARE-IMPLEMENTED VIDEO BROADCASTING RECEIVER 审中-公开
    硬件实现的视频广播接收器

    公开(公告)号:US20080320544A1

    公开(公告)日:2008-12-25

    申请号:US12124931

    申请日:2008-05-21

    IPC分类号: H04N7/173

    摘要: A hardware-implemented video broadcasting receiver is described. The hardware-implemented video broadcasting receiver includes a radio frequency (RF) tuner, a demodulator connected to the RF tuner, link layer logic connected to the demodulator, and a power manager connected to the RF tuner, the demodulator and the link layer logic. The power manager is configured to receive delta-T values extracted from a transport stream by the link layer logic, to determine whether each of the RF tuner, the demodulator and the link layer logic can be powered down based on the delta-T values, and to power down the RF tuner, the demodulator and the link layer logic based on the determination, thereby reducing the average power consumed by the video broadcasting receiver.

    摘要翻译: 描述硬件实现的视频广播接收机。 硬件实现的视频广播接收机包括射频(RF)调谐器,连接到RF调谐器的解调器,连接到解调器的链路层逻辑以及连接到RF调谐器,解调器和链路层逻辑的电源管理器。 功率管理器被配置为从链路层逻辑接收从传输流提取的Δ-T值,以确定RF调谐器,解调器和链路层逻辑中的每一个是否可以基于Δ-T值被掉电, 并且基于该确定来关闭RF调谐器,解调器和链路层逻辑,从而降低视频广播接收机消耗的平均功率。