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    Automatic crossbar generation and router connections for network-on-chip (NOC) topology generation
    2.
    发明授权
    Automatic crossbar generation and router connections for network-on-chip (NOC) topology generation 有权

    公开(公告)号：US10547514B2

    公开(公告)日：2020-01-28

    申请号：US15923519

    申请日：2018-03-16

    申请人： NetSpeed Systems, Inc.

    发明人： Nishant Rao ,  Sailesh Kumar ,  Pier Giorgio Raponi

    IPC分类号： H04L12/24 ,  H04L12/933

    摘要： A system and method for automatic crossbar generation and router connections for Network-on-Chip (NoC) topology generation is disclosed. Aspects of the present disclosure relate to methods, systems, and computer readable mediums for generating topology for a given SoC by significantly improving system efficiency by accurately indicating the best possible positions and configurations for hosts and ports within the hosts, along with indicating system level routes to be taken for traffic flows using the NoC interconnect architecture. Aspects of the present disclosure further relate to determining optimal positions of ports within hosts so as to enable low latency and higher message transmission efficiency between the hosts. In yet another aspect, a computationally efficient NoC topology is generated based on allocation of routers and NoC channels so as to identify most efficient routes for various system flows between hosts.

    Systems and methods for NoC construction
    3.
    发明授权
    Systems and methods for NoC construction 有权

    公开(公告)号：US10298485B2

    公开(公告)日：2019-05-21

    申请号：US15425919

    申请日：2017-02-06

    申请人： NetSpeed Systems, Inc.

    发明人： Pier Giorgio Raponi ,  Sailesh Kumar ,  Nishant Rao

    IPC分类号： H04L12/721 ,  H04L12/933 ,  G06N99/00 ,  G06N20/00

    摘要： Example implementations described herein are directed to systems and methods for generating a Network on Chip (NoC), which can involve determining a plurality of traffic flows from a NoC specification; grouping the plurality of traffic flows into a plurality of groups; utilizing a first machine learning algorithm to determine a sorting order on each of the plurality of groups of traffic flows; generating a list of traffic flows for NoC construction from the plurality of groups of traffic flows based on the sorting order; utilizing a second machine learning algorithm to select one or more mapping algorithms for each group of the plurality of groups of traffic flows for NoC construction; and generating the NoC based on a mapping from the selection of the one or more mapping algorithms.

    Automatic buffer sizing for optimal network-on-chip design
    4.
    发明授权
    Automatic buffer sizing for optimal network-on-chip design 有权

    公开(公告)号：US09860197B2

    公开(公告)日：2018-01-02

    申请号：US15438674

    申请日：2017-02-21

    申请人： NetSpeed Systems, Inc.

    发明人： Sailesh Kumar

    IPC分类号： H04L12/28 ,  H04L12/861 ,  H04L12/933 ,  H04L12/26 ,  H04L12/841

    CPC分类号： H04L49/9005 ,  H04L41/12 ,  H04L43/0888 ,  H04L43/0894 ,  H04L45/586 ,  H04L47/283 ,  H04L49/109

    摘要： The present disclosure relates to automatic sizing of NoC channel buffers of one or more virtual channels to optimize NoC design, SoC design, and to meet defined performance objectives. The present disclosure further relates to a NoC element such as a router or a bridge having input ports associated with input virtual channels, and output ports associated with output virtual channels, wherein, aspects of the present disclosure enable sizing of any or a combination of the width of the input virtual channel(s), width of the output virtual channel(s), buffer(s) associated with input virtual channels, and buffer(s) associated with output virtual channels. In another aspect, the sizing can be performed based on one or a combination of defined performance objectives, throughputs of the input virtual channels, and throughputs of the output virtual channels, load characteristics, bandwidth characteristics of each input/output channel, among other like parameters.

    System-on-chip (SoC) optimization through transformation and generation of a network-on-chip (NoC) topology
    9.
    发明授权
    System-on-chip (SoC) optimization through transformation and generation of a network-on-chip (NoC) topology 有权

    公开(公告)号：US10348563B2

    公开(公告)日：2019-07-09

    申请号：US15944653

    申请日：2018-04-03

    申请人： NetSpeed Systems, Inc.

    发明人： Nishant Rao ,  Sailesh Kumar ,  Pier Giorgio Raponi

    IPC分类号： H04L12/24 ,  G06F15/78 ,  G06F17/50 ,  G06F15/76

    摘要： The present disclosure is directed to system-on-chip (SoC) optimization through transformation and generation of a network-on-chip (NoC) topology. The present disclosure enables transformation from physical placement to logical placement to satisfy bandwidth requirements while maintaining lowest area and lowest routing with minimum cost (wiring and buffering) and latency. In an aspect, method according to the present application includes the steps of receiving at least a floor plan description of an System-on-Chips (SoCs), transforming said floor plan description into at least one logical grid layout of one or more rows and one or more columns, optimizing a number of said one or more rows and said one or more columns based at least on any or combination of a power, an area, or a performance to obtain an optimized transformed logical grid layout, and generating said Network-on-Chip (NoC) topology at least from said optimized transformed logical grid layout.

    Extracting features from a NoC for machine learning construction
    10.
    发明授权
    Extracting features from a NoC for machine learning construction 有权

    公开(公告)号：US10084725B2

    公开(公告)日：2018-09-25

    申请号：US15403723

    申请日：2017-01-11

    申请人： NetSpeed Systems, Inc.

    发明人： Pier Giorgio Raponi ,  Nishant Rao ,  Sailesh Kumar

    IPC分类号： H04L12/721 ,  H04L12/933 ,  H04L12/761 ,  H04L12/773 ,  H04L12/751

    CPC分类号： H04L49/109 ,  H04L49/251

    摘要： The present disclosure is directed to extracting features from a NoC for machine learning construction. Example implementations include a method for generating a Network on Chip (NoC), wherein the method can extract at least one feature from a NoC specification to derive at least one of: grid features, traffic features and topological features associated with the NoC. The method can perform a process on the at least one of the grid features, the traffic features and the topological features associated with the NoC to determine at least one of an evaluation of at least one mapping strategy selected from a plurality of mapping strategies of the NoC based on a quality metric, and the selection of the at least one mapping strategy is based on the quality metric. The method can further perform generate the NoC based on the process.