公开(公告)号：US20040210693A1

公开(公告)日：2004-10-21

申请号：US10414834

申请日：2003-04-15

申请人： Newisys, Inc.

发明人： Carl Zeitler ,  David B. Glasco ,  Rajesh Kota ,  Guru Prasadh ,  Richard R. Oehler ,  David S. Edrich

IPC分类号： G06F013/00

CPC分类号： G06F12/0815 ,  G06F12/0817 ,  H04L69/12

摘要： A computer system is described having a plurality of processing nodes interconnected by a first point-to-point architecture, and a system memory including a plurality of portions each of which is associated with one of the processing nodes. Each processing node includes a processor, and a memory controller for controlling access to the associated portion of the system memory, and may contain a host bridge for facilitating communication with a plurality of I/O devices. The first point-to-point architecture is operable to facilitate first transactions between the processors and the system memory. The computer system further includes at least one I/O controller and a second point-to-point architecture independent of the first point-to-point architecture and interconnecting the I/O controller and the host bridges. The at least one I/O controller is operable to facilitate second transactions between the I/O devices and the system memory via the second point-to-point architecture.

摘要翻译： 描述了具有通过第一点对点架构互连的多个处理节点的计算机系统，以及包括多个部分的系统存储器，每个部分与处理节点中的一个相关联。 每个处理节点包括处理器和用于控制对系统存储器的相关部分的访问的存储器控​​制器，并且可以包含用于促进与多个I / O设备的通信的主机桥。 第一点对点架构可操作以便于处理器和系统存储器之间的第一次交易。 计算机系统还包括至少一个I / O控制器和独立于第一点对点架构的互连I / O控制器和主机桥的第二点到点架构。 所述至少一个I / O控制器可操作以经由所述第二点对点架构促进所述I / O设备和所述系统存储器之间的第二事务。

公开(公告)号：US20040260917A1

公开(公告)日：2004-12-23

申请号：US10602396

申请日：2003-06-23

申请人： Newisys, Inc.

发明人： David S. Edrich

IPC分类号： G06F015/177

CPC分类号： G06F11/2284

摘要： A basic input/output system (BIOS) for use in a computer system having a plurality of processors is described. The BIOS is embodied in a computer readable medium as computer program instructions which are operable to facilitate substantially simultaneous operation of the plurality of processors. According to one embodiment, the processors are simultaneously enabled to test of different portions of the system memory.

摘要翻译： 描述了用于具有多个处理器的计算机系统中的基本输入/输出系统（BIOS）。 BIOS被实现在计算机可读介质中，作为可操作以促进多个处理器的基本同时操作的计算机程序指令。 根据一个实施例，处理器同时被允许测试系统存储器的不同部分。