公开(公告)号：US08799881B2

公开(公告)日：2014-08-05

申请号：US13180847

申请日：2011-07-12

申请人： Nobuaki Tojo ,  Hidenori Matsuzaki

发明人： Nobuaki Tojo ,  Hidenori Matsuzaki

IPC分类号： G06F9/45

CPC分类号： G06F8/4452 ,  G06F8/433 ,  G06F8/443 ,  G06F8/452 ,  G06F8/456

摘要： According to one embodiment, a parallelizing unit divides a loop into first and second processes based on a program to be converted and division information. The first and second processes respectively have termination control information, loop control information, and change information. The parallelizing unit inserts into the first process a determination process determining whether the second process is terminated at execution of an (n−1)th iteration of the second process when the second process is subsequent to the first process or determining whether the second process is terminated at execution of an nth iteration of the second process when the second process precedes the first process. The parallelizing unit inserts into the second process a control process controlling execution of the second process based on the result of determination notified by the determination process.

摘要翻译： 根据一个实施例，并行化单元基于要转换的程序和分割信息将循环划分为第一和第二进程。 第一和第二进程分别具有终止控制信息，循环控制信息和改变信息。 所述并行化单元在所述第二处理在所述第一处理之后确定所述第二处理是否执行所述第二处理的第（n-1）次迭代时确定所述第二处理是否终止的确定处理，或者确定所述第二处理是否为 当第二进程在第一进程之前时，执行第二进程的第n次迭代而终止。 并行化单元基于由确定处理通知的确定结果将第二处理的执行控制到第二处理中。

公开(公告)号：US20130218903A1

公开(公告)日：2013-08-22

申请号：US13423576

申请日：2012-03-19

申请人： Kenji Funaoka ,  Nobuaki Tojo ,  Susumu Takeda ,  Akira Kuroda ,  Hidenori Matsuzaki

发明人： Kenji Funaoka ,  Nobuaki Tojo ,  Susumu Takeda ,  Akira Kuroda ,  Hidenori Matsuzaki

IPC分类号： G06F17/30

CPC分类号： G06F8/456

摘要： It is to provide: a generation unit configured to generate one or more reference relationship pairs with reference certainty information of “uncertainty” as presentation information based on first reference relationship information showing whether it is “certain” for the reference data to refer the referenced data or it is “uncertain” for the reference data to refer the referenced data, every reference relationship pair formed with reference data and referenced data; and a conversion unit configured to convert the first reference relationship information into second reference relationship information using an input of a reference relationship for presentation information and reference dependence relationship information showing a dependence relationship between reference relationship pairs.

摘要翻译： 它提供：生成单元，被配置为基于第一参考关系信息生成一个或多个参考关系对，其中参考确定性信息为“不确定性”作为呈现信息，该第一参考关系信息表示参考数据是否“确定”以引用参考数据 或者参考数据参考参考数据是“不确定”的，每个参考关系对由参考数据和参考数据组成; 以及转换单元，被配置为使用用于呈现信息的参考关系的输入和表示参考关系对之间的依赖关系的参考依赖关系信息将第一参考关系信息转换为第二参考关系信息。

公开(公告)号：US20120042304A1

公开(公告)日：2012-02-16

申请号：US13013450

申请日：2011-01-25

申请人： Nobuaki Tojo ,  Ken Tanabe ,  Hidenori Matsuzaki

发明人： Nobuaki Tojo ,  Ken Tanabe ,  Hidenori Matsuzaki

IPC分类号： G06F9/45

CPC分类号： G06F8/52

摘要： According to one embodiment, as to a first program code including a plurality of variables, an access pattern of each variable by a processor is decided. The first program code is converted to a second program code including a plurality of threads. Each thread is executed by one of a plurality of cores of the processor. The second program code includes, (a) a first member structure including variables decided as a first access pattern, (b) a first route-pointer indicating the first member structure, the first route-pointer having a first access property representing accessibility by a core to execute a first thread, (c) a second member structure including variables decided as a second access pattern, (d) a second route-pointer indicating the second member structure, the second route-pointer having a second access property representing accessibility by the core to execute the first thread and a core to execute a second thread.

摘要翻译： 根据一个实施例，对于包括多个变量的第一程序代码，决定处理器的每个变量的访问模式。 将第一程序代码转换为包括多个线程的第二程序代码。 每个线程由处理器的多个核心之一执行。 第二程序代码包括：（a）包括被确定为第一访问模式的变量的第一成员结构，（b）指示第一成员结构的第一路由指针，第一路由指针具有代表可访问性的第一访问属性 执行第一线程的核心，（c）包括被确定为第二访问模式的变量的第二成员结构，（d）指示所述第二成员结构的第二路由指针，所述第二路由指针具有表示可访问性的第二访问属性 执行第一个线程的核心和执行第二个线程的核心。

公开(公告)号：US08732684B2

公开(公告)日：2014-05-20

申请号：US13013450

申请日：2011-01-25

申请人： Nobuaki Tojo ,  Ken Tanabe ,  Hidenori Matsuzaki

发明人： Nobuaki Tojo ,  Ken Tanabe ,  Hidenori Matsuzaki

IPC分类号： G06F9/45

CPC分类号： G06F8/52

摘要： According to one embodiment, a first program code including a plurality of variables is converted to a second program code to be executed by a multi-core processor including a plurality of cores. Specifically, an access pattern of each variable in the first program code is decided. All variables in the first program code are classified into a plurality of groups each of which variables belong to the same access pattern. A member structure of each group having variables belonging to the same access pattern is created. Each member structure includes variables of one group. A route-pointer indicating an address (in a memory) of variables of the member structure is created. The variables in the first program code are converted to the member structure and the route-pointer (in the second program code) that indicate the variables. The second program code is outputted to the multi-core processor.

摘要翻译： 根据一个实施例，包括多个变量的第一程序代码被转换为由包括多个核的多核处理器执行的第二程序代码。 具体地，确定第一程序代码中的每个变量的访问模式。 第一程序代码中的所有变量被分类为多个组，每个变量都属于相同的访问模式。 创建具有属于相同访问模式的变量的每个组的成员结构。 每个成员结构包括一个组的变量。 指示指示成员结构变量的地址（在存储器中）的路由指针。 第一个程序代码中的变量被转换为指示变量的成员结构和路由指针（在第二个程序代码中）。 第二程序代码被输出到多核处理器。

公开(公告)号：US08688918B2

公开(公告)日：2014-04-01

申请号：US13422054

申请日：2012-03-16

申请人： Yuji Ishikawa ,  Akira Kuroda ,  Hidenori Matsuzaki ,  Nobuaki Tojo

发明人： Yuji Ishikawa ,  Akira Kuroda ,  Hidenori Matsuzaki ,  Nobuaki Tojo

IPC分类号： G06F12/00

CPC分类号： G06F12/0837 ,  G06F8/4442

摘要： According to one embodiment, a program converting device includes an access attribute determining unit, a non-sharing target classifying unit, and a converting unit. The access attribute determining unit calculates exclusive accesses from memory accesses by threads forming a source program and determines a memory access using a cache memory among the calculated exclusive accesses. The non-sharing target classifying unit determines an access data item that does not share a cache line with another access data item among the access data items that are accessed using the cache memories. The converting unit inserts a process that does not share the cache line into the source program based on the determination result of the non-sharing target classifying unit.

摘要翻译： 根据一个实施例，程序转换装置包括访问属性确定单元，非共享目标分类单元和转换单元。 访问属性确定单元通过形成源程序的线程来计算来自存储器访问的独占访问，并且在所计算的独占访问中使用高速缓存存储器确定存储器访问。 非共享目标分类单元使用高速缓冲存储器访问的访问数据项中的另一访问数据项目来确定不与高速缓存行共享高速缓存行的访问数据项。 转换单元基于非共享目标分类单元的确定结果将不共享高速缓存行的处理插入到源程序中。

公开(公告)号：US20120180067A1

公开(公告)日：2012-07-12

申请号：US13347416

申请日：2012-01-10

申请人： Kenji FUNAOKA ,  Nobuaki Tojo ,  Susumu Takeda ,  Akira Kuroda ,  Hidenori Matsuzaki

发明人： Kenji FUNAOKA ,  Nobuaki Tojo ,  Susumu Takeda ,  Akira Kuroda ,  Hidenori Matsuzaki

IPC分类号： G06F9/46

CPC分类号： G06F8/456

摘要： According to an embodiment, based on task border information, and first-type dependency relationship information containing N number of nodes corresponding to data accesses to one set of data, containing edges representing dependency relationship between the nodes, and having at least one node with an access reliability flag indicating reliability/unreliability of corresponding data access; task border edges, of edges extending over task borders, are identified that have an unreliable access node linked to at least one end, and presentation information containing unreliable access nodes is generated. According to dependency existence information input corresponding to the set of data, conversion information indicating absence of data access to the unreliable access nodes is output. According to the conversion information, the first-type dependency relationship information is converted into second-type dependency relationship information containing M number of nodes (0≦M≦N) corresponding to data accesses to the set of data and containing edges representing inter-node dependency relationship.

摘要翻译： 根据实施例，基于任务边界信息和包含对应于对一组数据的数据访问的N个节点的第一类型依赖关系信息，其包含表示节点之间的依赖关系的边缘，并且具有至少一个具有 指示相应数据访问的可靠性/不可靠性的访问可靠性标志; 识别出任务边界在任务边界上延伸的边缘，其具有链接到至少一个端点的不可靠访问节点，并且生成包含不可靠访问节点的呈现信息。 根据与该组数据相对应的依赖存在信息，输出指示不存在不可靠访问节点的数据访问的转换信息。 根据转换信息，将第一类型依赖关系信息转换成与数据访问相对应的M个节点（0＆nlE; M＆nlE; N）的第二类型依赖关系信息，并且包含表示节点间的边缘 依赖关系。

公开(公告)号：US09043803B2

公开(公告)日：2015-05-26

申请号：US13347416

申请日：2012-01-10

申请人： Kenji Funaoka ,  Nobuaki Tojo ,  Susumu Takeda ,  Akira Kuroda ,  Hidenori Matsuzaki

发明人： Kenji Funaoka ,  Nobuaki Tojo ,  Susumu Takeda ,  Akira Kuroda ,  Hidenori Matsuzaki

IPC分类号： G06F9/45

CPC分类号： G06F8/456

摘要： According to an embodiment, based on task border information, and first-type dependency relationship information containing N number of nodes corresponding to data accesses to one set of data, containing edges representing dependency relationship between the nodes, and having at least one node with an access reliability flag indicating reliability/unreliability of corresponding data access; task border edges, of edges extending over task borders, are identified that have an unreliable access node linked to at least one end, and presentation information containing unreliable access nodes is generated. According to dependency existence information input corresponding to the set of data, conversion information indicating absence of data access to the unreliable access nodes is output. According to the conversion information, the first-type dependency relationship information is converted into second-type dependency relationship information containing M number of nodes (0≦M≦N) corresponding to data accesses to the set of data and containing edges representing inter-node dependency relationship.

摘要翻译： 根据实施例，基于任务边界信息和包含对应于对一组数据的数据访问的N个节点的第一类型依赖关系信息，其包含表示节点之间的依赖关系的边缘，并且具有至少一个具有 指示相应数据访问的可靠性/不可靠性的访问可靠性标志; 识别出任务边界在任务边界上延伸的边缘，其具有链接到至少一个端点的不可靠访问节点，并且生成包含不可靠访问节点的呈现信息。 根据与该组数据相对应的依赖存在信息，输出指示不存在不可靠访问节点的数据访问的转换信息。 根据转换信息，将第一类型依赖关系信息转换成与数据访问相对应的M个节点（0＆nlE; M＆nlE; N）的第二类型依赖关系信息，并且包含表示节点间的边缘 依赖关系。

公开(公告)号：US20130117512A1

公开(公告)日：2013-05-09

申请号：US13422054

申请日：2012-03-16

申请人： Yuji Ishikawa ,  Akira Kuroda ,  Hidenori Matsuzaki ,  Nobuaki Tojo

发明人： Yuji Ishikawa ,  Akira Kuroda ,  Hidenori Matsuzaki ,  Nobuaki Tojo

IPC分类号： G06F12/08

CPC分类号： G06F12/0837 ,  G06F8/4442

摘要： According to one embodiment, a program converting device includes an access attribute determining unit, a non-sharing target classifying unit, and a converting unit. The access attribute determining unit calculates exclusive accesses from memory accesses by threads forming a source program and determines a memory access using a cache memory among the calculated exclusive accesses. The non-sharing target classifying unit determines an access data item that does not share a cache line with another access data item among the access data items that are accessed using the cache memories. The converting unit inserts a process that does not share the cache line into the source program based on the determination result of the non-sharing target classifying unit.

摘要翻译： 根据一个实施例，程序转换装置包括访问属性确定单元，非共享目标分类单元和转换单元。 访问属性确定单元通过形成源程序的线程来计算来自存储器访问的独占访问，并且在所计算的独占访问中使用高速缓存存储器确定存储器访问。 非共享目标分类单元使用高速缓冲存储器访问的访问数据项中的另一访问数据项目来确定不与高速缓存行共享高速缓存行的访问数据项。 转换单元基于非共享目标分类单元的确定结果将不共享高速缓存行的处理插入到源程序中。

公开(公告)号：US20120079467A1

公开(公告)日：2012-03-29

申请号：US13180847

申请日：2011-07-12

申请人： Nobuaki TOJO ,  Hidenori Matsuzaki

发明人： Nobuaki TOJO ,  Hidenori Matsuzaki

IPC分类号： G06F9/45

CPC分类号： G06F8/4452 ,  G06F8/433 ,  G06F8/443 ,  G06F8/452 ,  G06F8/456

摘要： According to one embodiment, a parallelizing unit divides a loop into first and second processes based on a program to be converted and division information. The first and second processes respectively have termination control informationloop control information and change information indicating change of data to be referred to in a process subsequent to the loop. The parallelizing unit inserts a determination process into the first process, which determines whether the second process is terminated at execution of an (n−1)th iteration of the second process when the second process is subsequent to the first process, or determines whether the second process is terminated at execution of an nth iteration of the second process when the second process precedes the first process, and notifies the second process of a result of the determination, and inserts a control process into the second process, which controls execution of the second process based on the result of determination notified.

摘要翻译： 根据一个实施例，并行化单元基于要转换的程序和分割信息将循环划分为第一和第二进程。 第一和第二处理分别具有终止控制信息环控制信息和指示在循环之后的处理中要参考的数据的改变的改变信息。 并行化单元将确定处理插入到第一处理中，该第一处理确定当第二处理在第一处理之后执行第二处理的第（n-1）次迭代时是否终止第二处理，或者确定是否 当第二进程在第一进程之前执行第二进程的第n次迭代时，第二进程终止，并且向第二进程通知确定结果，并且将控制进程插入到控制执行的第二进程中 基于通知结果的第二个过程。

公开(公告)号：US08745313B2

公开(公告)日：2014-06-03

申请号：US12394632

申请日：2009-02-27

申请人： Junji Yano ,  Kosuke Hatsuda ,  Hidenori Matsuzaki ,  Wataru Okamoto

发明人： Junji Yano ,  Kosuke Hatsuda ,  Hidenori Matsuzaki ,  Wataru Okamoto

IPC分类号： G06F12/00

CPC分类号： G06F3/061 ,  G06F3/065 ,  G06F3/0661 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2206/1014 ,  G06F2212/7203 ,  G06F2212/7205 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/102 ,  G11C2211/5643 ,  G11C2211/5646

摘要： A memory system includes a nonvolatile semiconductor memory having blocks, the block being data erasing unit; and a controller configured to execute; an update processing for; writing superseding data in a block, the superseding data being treated as valid data; and invalidating superseded data having the same logical address as the superseding data, the superseded data being treated as invalid data; and a compaction processing for; retrieving blocks having invalid data using a management tablet the management table managing blocks in a linked list format for each number of valid data included in the block; selecting a compaction source block having at least one valid data from the retrieved blocks; copying a plurality of valid data included in the compaction source blocks into a compaction target block; invalidating the plurality of valid data in the compaction source blocks; and releasing the compaction source blocks in which all data are invalidated.

摘要翻译： 存储器系统包括具有块的非易失性半导体存储器，该块是数据擦除单元; 以及控制器，被配置为执行; 更新处理; 在块中写入替代数据，替代数据被视为有效数据; 并且使具有与取代数据相同的逻辑地址的替代数据无效，所取代的数据被视为无效数据; 和压实处理; 使用管理数据库检索具有无效数据的块，所述管理表管理所述块中包括的每个数量的有效数据的链接列表格式的块; 从所检索的块中选择具有至少一个有效数据的压缩源块; 将压缩源块中包括的多个有效数据复制到压缩目标块中; 使压缩源块中的多个有效数据无效; 并释放其中所有数据无效的压缩源块。