公开(公告)号：US08243865B2

公开(公告)日：2012-08-14

申请号：US11763663

申请日：2007-06-15

申请人： Nobunari Tsukamoto ,  Hidetoshi Ema

发明人： Nobunari Tsukamoto ,  Hidetoshi Ema

IPC分类号： H04L7/00

CPC分类号： H03M7/3048

摘要： A disclosed data processing apparatus includes: a binarization unit binarizing input data based on a threshold voltage; a capture unit capturing data from a binary output binarized by the binarization unit; a duty cycle detection unit detecting a duty cycle of the binary output; and a control unit controlling a level of the input data based on the duty cycle detected by the duty cycle detection unit.

摘要翻译： 公开的数据处理装置包括：二值化单元，基于阈值电压二值化输入数据; 捕获单元，从由二值化单元二值化的二进制输出中获取数据; 占空比检测单元，检测二进制输出的占空比; 以及控制单元，其基于由占空比检测单元检测到的占空比来控制输入数据的电平。

公开(公告)号：US20090046784A1

公开(公告)日：2009-02-19

申请号：US12222523

申请日：2008-08-11

申请人： Nobunari Tsukamoto ,  Hidetoshi Ema

发明人： Nobunari Tsukamoto ,  Hidetoshi Ema

IPC分类号： H04B14/06

CPC分类号： G06F13/4291

摘要： A differential signal output device is disclosed that outputs transmission data as a differential signal. The device includes a first differential signal generation circuit that amplifies a signal representing the transmission data and generates the differential signal from the amplified signal; a dummy data generation circuit that is synchronized with a reference clock of the transmission data and generates dummy data that change only in a bit where the transmission data do not change; and a second differential signal generation circuit that amplifies a signal representing the dummy data and generates another differential signal from the amplified signal.

摘要翻译： 公开了一种输出传输数据作为差分信号的差分信号输出装置。 该装置包括：第一差分信号生成电路，其放大表示发送数据的信号，并从放大信号生成差分信号; 与发送数据的基准时钟同步的伪数据生成电路，生成仅在发送数据不发生变化的比特中变化的伪数据; 以及第二差分信号生成电路，其对表示所述虚拟数据的信号进行放大，并从所述放大信号生成另一差分信号。

公开(公告)号：US20080056420A1

公开(公告)日：2008-03-06

申请号：US11845416

申请日：2007-08-27

申请人： Nobunari Tsukamoto ,  Hidetoshi Ema

发明人： Nobunari Tsukamoto ,  Hidetoshi Ema

IPC分类号： H04L7/00

CPC分类号： H04L7/0338

摘要： A multiphase delay unit causes a different delay time to a reference clock to generate a multiphase clock having a different phase. A multiphase sampling unit samples the input signal using the multiphase clock, and outputs multiphase sampling data. A phase selecting unit detects a phase relation of the multiphase clock using the multiphase sampling data, and selects output data from the multiphase sampling data based on data obtained by detecting the phase relation of the multiphase clock.

摘要翻译： 多相延迟单元对参考时钟产生不同的延迟时间以产生具有不同相位的多相时钟。 多相采样单元使用多相时钟采样输入信号，并输出多相采样数据。 相位选择单元使用多相采样数据检测多相时钟的相位关系，并且基于通过检测多相时钟的相位关系而获得的数据，从多相采样数据中选择输出数据。

公开(公告)号：US08194780B2

公开(公告)日：2012-06-05

申请号：US12222523

申请日：2008-08-11

申请人： Nobunari Tsukamoto ,  Hidetoshi Ema

发明人： Nobunari Tsukamoto ,  Hidetoshi Ema

IPC分类号： H04B14/06

CPC分类号： G06F13/4291

摘要： A differential signal output device is disclosed that outputs transmission data as a differential signal. The device includes a first differential signal generation circuit that amplifies a signal representing the transmission data and generates the differential signal from the amplified signal; a dummy data generation circuit that is synchronized with a reference clock of the transmission data and generates dummy data that change only in a bit where the transmission data do not change; and a second differential signal generation circuit that amplifies a signal representing the dummy data and generates another differential signal from the amplified signal.

摘要翻译： 公开了一种输出传输数据作为差分信号的差分信号输出装置。 该装置包括：第一差分信号生成电路，其放大表示发送数据的信号，并从放大信号生成差分信号; 与发送数据的基准时钟同步的伪数据生成电路，生成仅在发送数据不发生变化的比特中变化的伪数据; 以及第二差分信号生成电路，其对表示所述虚拟数据的信号进行放大，并从所述放大信号生成另一差分信号。

公开(公告)号：US08023605B2

公开(公告)日：2011-09-20

申请号：US11845416

申请日：2007-08-27

申请人： Nobunari Tsukamoto ,  Hidetoshi Ema

发明人： Nobunari Tsukamoto ,  Hidetoshi Ema

IPC分类号： H04L7/00

CPC分类号： H04L7/0338

摘要： A multiphase delay unit causes different delay times to a reference clock to generate a multiphase clock with different phases. A multiphase sampling unit samples the input signal using the multiphase clock, and outputs multiphase sampling data. A phase selecting unit detects a phase relation of the multiphase clock using the multiphase sampling data, and selects output data from the multiphase sampling data based on a result of detecting the phase relation.

摘要翻译： 多相延迟单元对参考时钟产生不同的延迟时间以产生具有不同相位的多相时钟。 多相采样单元使用多相时钟采样输入信号，并输出多相采样数据。 相位选择单元使用多相采样数据检测多相时钟的相位关系，并且基于检测相位关系的结果从多相采样数据中选择输出数据。

公开(公告)号：US20080143814A1

公开(公告)日：2008-06-19

申请号：US11793594

申请日：2006-04-20

申请人： Naruhiro Masui ,  Hidetoshi Ema ,  Nobunari Tsukamoto

发明人： Naruhiro Masui ,  Hidetoshi Ema ,  Nobunari Tsukamoto

IPC分类号： B41J2/435

CPC分类号： G02B26/127 ,  G06K15/1219 ,  H04N1/0473 ,  H04N2201/0082 ,  H04N2201/04755 ,  H04N2201/04791 ,  H04N2201/04794

摘要： A comparator compares a time interval between a first synchronization signal and a second synchronization signal with a target value, and outputs an error therebetween. A frequency calculator calculates a set value of a pixel clock frequency based on the error output from the comparator, and outputs a frequency specification signal for specifying a pixel clock frequency according to the calculated set value. A frequency divider divides a high frequency clock generated by a high frequency clock generator by a frequency division ratio based on the frequency specification signal output from the frequency calculator, and generates the pixel clock.

摘要翻译： 比较器将第一同步信号和第二同步信号之间的时间间隔与目标值进行比较，并在其间输出误差。 频率计算器基于从比较器输出的误差来计算像素时钟频率的设定值，并根据计算出的设定值输出用于指定像素时钟频率的频率指定信号。 分频器基于从频率计算器输出的频率指定信号，通过分频比将由高频时钟发生器产生的高频时钟分频，并生成像素时钟。

公开(公告)号：US07791634B2

公开(公告)日：2010-09-07

申请号：US11793594

申请日：2006-04-20

申请人： Naruhiro Masui ,  Hidetoshi Ema ,  Nobunari Tsukamoto

发明人： Naruhiro Masui ,  Hidetoshi Ema ,  Nobunari Tsukamoto

IPC分类号： B41J2/435

CPC分类号： G02B26/127 ,  G06K15/1219 ,  H04N1/0473 ,  H04N2201/0082 ,  H04N2201/04755 ,  H04N2201/04791 ,  H04N2201/04794

摘要： A comparator compares a time interval between a first synchronization signal and a second synchronization signal with a target value, and outputs an error therebetween. A frequency calculator calculates a set value of a pixel clock frequency based on the error output from the comparator, and outputs a frequency specification signal for specifying a pixel clock frequency according to the calculated set value. A frequency divider divides a high frequency clock generated by a high frequency clock generator by a frequency division ratio based on the frequency specification signal output from the frequency calculator, and generates the pixel clock.

摘要翻译： 比较器将第一同步信号和第二同步信号之间的时间间隔与目标值进行比较，并在其间输出误差。 频率计算器基于从比较器输出的误差来计算像素时钟频率的设定值，并根据计算出的设定值输出用于指定像素时钟频率的频率指定信号。 分频器基于从频率计算器输出的频率指定信号，通过分频比将由高频时钟发生器产生的高频时钟分频，并生成像素时钟。

公开(公告)号：US20070297548A1

公开(公告)日：2007-12-27

申请号：US11763663

申请日：2007-06-15

申请人： Nobunari Tsukamoto ,  Hidetoshi Ema

发明人： Nobunari Tsukamoto ,  Hidetoshi Ema

IPC分类号： H04L7/00

CPC分类号： H03M7/3048

摘要： A disclosed data processing apparatus includes: a binarization unit binarizing input data based on a threshold voltage; a capture unit capturing data from a binary output binarized by the binarization unit; a duty cycle detection unit detecting a duty cycle of the binary output; and a control unit controlling a level of the input data based on the duty cycle detected by the duty cycle detection unit.

摘要翻译： 公开的数据处理装置包括：二值化单元，基于阈值电压二值化输入数据; 捕获单元，从由二值化单元二值化的二进制输出中获取数据; 占空比检测单元，检测二进制输出的占空比; 以及控制单元，其基于由占空比检测单元检测到的占空比来控制输入数据的电平。

公开(公告)号：US07200091B2

公开(公告)日：2007-04-03

申请号：US10274193

申请日：2002-10-21

申请人： Naruhiro Masui ,  Hidetoshi Ema

发明人： Naruhiro Masui ,  Hidetoshi Ema

IPC分类号： G11B20/10

CPC分类号： G11B7/1263 ,  G11B7/0062 ,  G11B11/1053

摘要： A light source driving unit includes a modulating signal generating section generating modulating signals based on driving waveform generating information of a light source, a current source selecting section selecting one or more currents output from current sources based on the modulating signals, a light source driving section generating a current having multi-levels based on the one or more currents selected and supplying the generated current to the light source to drive the light source so that light in multi-levels is generated from the light source, and a cancelling section adding a signal error amount which cancels differences in amounts of signal delays generated between the modulating signal generating section and the light source driving section at a stage prior to the current source selecting section.

摘要翻译： 光源驱动单元包括：调制信号产生部分，基于光源的驱动波形产生信息产生调制信号;电流源选择部分，根据调制信号选择从电流源输出的一个或多个电流;光源驱动部分 基于所选择的一个或多个电流产生具有多电平的电流，并将所产生的电流提供给光源以驱动光源，使得从光源产生多电平的光;以及消除部分， 误差量，其消除在当前源选择部分之前的阶段在调制信号产生部分和光源驱动部分之间产生的信号延迟量的差异。

公开(公告)号：US20070030785A1

公开(公告)日：2007-02-08

申请号：US11581150

申请日：2006-10-16

申请人： Naruhiro Masui ,  Hidetoshi Ema

发明人： Naruhiro Masui ,  Hidetoshi Ema

IPC分类号： G11B20/10

CPC分类号： G11B7/1263 ,  G11B7/0062 ,  G11B11/1053

摘要： A light source driving unit includes a modulating signal generating section generating modulating signals based on driving waveform generating information of a light source, a current source selecting section selecting one or more currents output from current sources based on the modulating signals, a light source driving section generating a current having multi-levels based on the one or more currents selected and supplying the generated current to the light source to drive the light source so that light in multi-levels is generated from the light source, and a cancelling section adding a signal error amount which cancels differences in amounts of signal delays generated between the modulating signal generating section and the light source driving section at a stage prior to the current source selecting section.