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公开(公告)号:US06959003B1
公开(公告)日:2005-10-25
申请号:US09400428
申请日:1999-09-21
申请人: Nobutaka Shinohara , Tomoaki Sugiyama , Takashi Cho , Kazuhiko Ide , Yoshio Inagaki , Sadao Tanikoshi
发明人: Nobutaka Shinohara , Tomoaki Sugiyama , Takashi Cho , Kazuhiko Ide , Yoshio Inagaki , Sadao Tanikoshi
CPC分类号: H04N5/268
摘要: A serial transmission path switching system includes a matrix switch section for switching N×M lines at a fixed rate. An optical receiving section is connected to receive an optical signal from an optical transmission path, photoelectrically convert it, and supply it to the matrix switch section. An optical transmitting section is connected to convert an output from the matrix switch section into an optical signal and send it to an optical transmission path. An input buffer is connected to the terminal of the optical transmission path connected to the optical receiving section to equalize the input signal from an input-side communication device, convert the signal into an optical signal, and send it to the optical transmission path. An output buffer is connected to the terminal of the optical transmission path connected to the optical transmitting section to convert an optical signal from the optical transmitting section into an electrical signal, equalize it, and output it to an output-side communication device.
摘要翻译: 串行传输路径切换系统包括用于以固定速率切换N×M线的矩阵切换部分。 连接光接收部分以从光传输路径接收光信号,对其进行光电转换,并将其提供给矩阵切换部分。 连接光发送部分,将矩阵切换部分的输出转换成光信号并将其发送到光传输路径。 输入缓冲器连接到连接到光接收部分的光传输路径的终端,以平衡来自输入侧通信设备的输入信号,将信号转换成光信号,并将其发送到光传输路径。 输出缓冲器连接到连接到光发射部分的光传输路径的终端,以将来自光发射部分的光信号转换成电信号,使其均衡,并将其输出到输出侧通信装置。
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公开(公告)号:US06388712B1
公开(公告)日:2002-05-14
申请号:US09044229
申请日:1998-03-19
申请人: Nobutaka Shinohara , Masuo Wada , Haruhiko Inokuma
发明人: Nobutaka Shinohara , Masuo Wada , Haruhiko Inokuma
IPC分类号: H04N708
摘要: A broadcast verification system includes a CM creation device for creating a CM signal to be included in a television signal and a verification device for receiving the television broadcast signal transmitted from a broadcast station and checking the CM signal. The CM creation device includes an encoder for superimposing unique ID information identifying the CM signal to the CM signal at a predetermined position. The verification device includes a decoder for extracting the ID information from the television broadcast signal, a verification section for verifying, on the basis of the extracted ID information and a CM schedule supplied from the broadcast station through a path different from that for the television broadcast signal, whether the CM has been broadcast according to the schedule, and a verification information storage means for storing verification information containing at least the verification result, the broadcasting time of the CM, and the broadcast channel.
摘要翻译: 广播验证系统包括用于创建要包括在电视信号中的CM信号的CM创建设备和用于接收从广播站发送的电视广播信号并检查CM信号的验证设备。 CM创建装置包括编码器,用于将识别CM信号的唯一ID信息叠加到预定位置处的CM信号。 验证装置包括:解码器,用于从电视广播信号中提取ID信息;验证部分,用于根据所提取的ID信息和从广播站通过与电视广播不同的路径提供的CM调度进行验证 信号,CM是否已经根据时间表广播,以及验证信息存储装置,用于存储至少包含验证结果,CM的广播时间和广播信道的验证信息。
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公开(公告)号:US4646154A
公开(公告)日:1987-02-24
申请号:US599614
申请日:1984-04-03
CPC分类号: G06T17/00 , H04N5/2622 , H01L2224/29 , H01L2224/29298 , H01L2924/00011 , H01L2924/00013
摘要: A vertical edge width calculation circuit 31 has a plurality of series-connected delay circuits 31a to 31h each having a one-horizontal period delay time. A horizontal edge width calculation circuit has a plurality of 1-pixel delay circuits 32a to 32h corresponding to the edge width. A horizontal distance between an input digital superimpose key signal and a raster position is calculated in accordance with the calculated vertical distance, that is, the edge width. In accordance with the calculated vertical and horizontal distances, a detection circuit 34 detects as a true Euclidean distance a minimum value among a plurality of Euclidean distances between the digital superimpose key signal and the raster position which are stored in ROMs 33.sub.0 to 33.sub.5.
摘要翻译: PCT No.PCT / JP83 / 00204 Sec。 1984日期1984年4月3日 102(e)1984年4月3日,PCT提交1983年6月24日。垂直边缘宽度计算电路31具有多个串联连接的延迟电路31a至31h,每个延迟电路具有一个水平周期的延迟时间。 水平边缘宽度计算电路具有对应于边缘宽度的多个1像素延迟电路32a至32h。 根据计算出的垂直距离,即边缘宽度,计算输入数字叠加键信号和光栅位置之间的水平距离。 根据计算出的垂直和水平距离,检测电路34将存储在ROM 330至335中的数字叠加键信号和光栅位置之间的多个欧几里德距离中的最小值检测为真欧几里德距离。
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公开(公告)号:US4621280A
公开(公告)日:1986-11-04
申请号:US712244
申请日:1985-03-15
IPC分类号: H04N9/75
CPC分类号: H04N9/75
摘要: The digital chromakey system filters out a color signal from a first digital color-television signal and produces a chromakey signal which is combined with the first digital color-television signal to cancel out the color portion. The chromakey signal is also combined with a second color-television signal so that the second color television signal can be inserted into the first color-television signal whose color portion was cancelled.
摘要翻译: 数字色度系统从第一数字彩色电视信号中滤出彩色信号,并产生与第一数字彩色电视信号组合的色差信号,以抵消彩色部分。 色度信号也与第二彩色电视信号组合,使得第二彩色电视信号可以被插入其颜色部分被取消的第一彩色电视信号中。
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