Integrated circuit inputs and outputs

    公开(公告)号:US11048653B2

    公开(公告)日:2021-06-29

    申请号:US15736762

    申请日:2016-06-16

    Inventor: Rolf Ambühl

    Abstract: An integrated circuit microprocessor device comprises a central processing unit (CPU) and a general purpose input or output subsystem (2) having at least one external connection (4). The external connection is configured to provide an input to or output from the device depending upon an associated setting in the general purpose input or output subsystem. At least one further module on the device is configured to be able to request at least a first or a second task which may control a state of the external connection, the general purpose input or output subsystem being configured, upon receipt of conflicting requests for the first and second tasks, to apply a predetermined priority to allow only one of the tasks to be applied to the external connection.

    Radio apparatus for communicating digital audio streams

    公开(公告)号:US12120622B2

    公开(公告)日:2024-10-15

    申请号:US17637224

    申请日:2020-08-20

    CPC classification number: H04W56/002 G06F3/162 H04R1/025 H04R3/00 H04S1/007

    Abstract: A radio receiver apparatus comprises radio circuitry for receiving a sequence of radio data packets, transmitted at regular intervals, wherein the sequence of radio data packets encodes a digital audio stream and each radio data packet encodes a respective number of audio samples from the digital audio stream. The apparatus also comprises a digital audio interface for outputting audio samples from the received digital audio stream, a controllable oscillator arranged to control an output rate at which the audio samples are output from the digital audio interface, and a timer. The apparatus also comprises control logic, configured to use the timer to measure an interval between receiving each of a pair of the radio data packets, and to control the oscillator to vary the output rate incrementally, in a number of steps, while outputting the audio samples from one radio data packet. The number of steps, or the size of each step, or both, depends on the measured interval.

    Waveform generation
    3.
    发明授权

    公开(公告)号:US11016522B2

    公开(公告)日:2021-05-25

    申请号:US15736766

    申请日:2016-06-16

    Abstract: A digital microprocessor device (2) has: a central processing unit; a memory (8); and an output signal module (4). The output signal module comprises: a counter (6) arranged to count to a predetermined count value; and at least one comparator (10a, 10b, 10c) arranged to change an output signal (14a, 14b, 14c) from a first output state to a second output state when the counter reaches a predetermined comparator value. The output signal module is arranged to load automatically from the memory at least one parameter selected from the group comprising: the predetermined count value, the predetermined comparator value and the first output state or the second output state, without receipt of an instruction from the central processing unit.

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