公开(公告)号：US20130321036A1

公开(公告)日：2013-12-05

申请号：US13904021

申请日：2013-05-29

Applicant: Novatek Microelectronics Corp.

Inventor： Ying-Neng Huang ,  Chih-Yuan Hsieh ,  Jie-Jung Huang ,  Tsung-Yin Yu

IPC: H03K17/14

CPC classification number: H03K17/145 ,  H03K19/017509

Abstract: A gate driving apparatus is disclosed. The gate driving apparatus includes a first gate driving chip and N second gate driving chips, wherein N is positive integer. The first gate driving chip has a first input pin and a first current output pin. The first gate driving chip receives a reference electrical signal by the first input pin, and generates a reference current according to the reference electrical signal. The first current output pin is used for outputting the reference current. Each of the second gate driving chips has a current input pin for receiving the reference current and a second current output pin for outputting the reference current. The first gate driving chip and the second gate driving chips generate at least a first output signal and at least N second output signals according to the reference current.

公开(公告)号：US20150214942A1

公开(公告)日：2015-07-30

申请号：US14684439

申请日：2015-04-13

Applicant: Novatek Microelectronics Corp.

Inventor： Ying-Neng Huang ,  Chih-Yuan Hsieh ,  Jie-Jung Huang ,  Tsung-Yin Yu

IPC: H03K17/14 ,  H03K19/0175

CPC classification number: H03K17/145 ,  H03K19/017509

Abstract: A gate driving apparatus is disclosed. The gate driving apparatus includes a first gate driving chip and N second gate driving chips, wherein N is positive integer. The first gate driving chip has a first input pin and a first current output pin. The first gate driving chip receives a reference electrical signal by the first input pin, and generates a reference current according to the reference electrical signal. The first current output pin is used for outputting the reference current. Each of the second gate driving chips has a current input pin for receiving the reference current and a second current output pin for outputting the reference current. The first gate driving chip and the second gate driving chips generate at least a first output signal and at least N second output signals according to the reference current.

Abstract translation: 公开了一种门驱动装置。 栅极驱动装置包括第一栅极驱动芯片和N个第二栅极驱动芯片，其中N是正整数。 第一栅极驱动芯片具有第一输入引脚和第一电流输出引脚。 第一栅极驱动芯片由第一输入引脚接收参考电信号，并根据参考电信号产生参考电流。 第一个电流输出引脚用于输出参考电流。 每个第二栅极驱动芯片具有用于接收参考电流的电流输入引脚和用于输出参考电流的第二电流输出引脚。 第一栅极驱动芯片和第二栅极驱动芯片根据参考电流产生至少第一输出信号和至少N个第二输出信号。

公开(公告)号：US20140210521A1

公开(公告)日：2014-07-31

申请号：US14054854

申请日：2013-10-16

Applicant: Novatek Microelectronics Corp.

Inventor： Chih-Yuan Hsieh ,  Tsung-Yin Yu ,  Jie-Jung Huang

IPC: H03K3/01

CPC classification number: H03K3/01 ,  H03K17/06

Abstract: A gate/source driving apparatus includes a first gate/source driving chip and a second gate/source driving chip. The first gate/source driving chip includes a plurality of first charge pump circuits, each of which has a voltage input end, a voltage output end, a first capacitor end, and a second capacitor end. The second gate/source driving chip includes a plurality of second charge pump circuits, each of which also has a voltage input end, a voltage output end, a first capacitor end, and a second capacitor end. The voltage output end of at least one of the first charge pump circuits is coupled to the voltage input end of at least one of the second charge pump circuits.

Abstract translation: 栅极/源极驱动装置包括第一栅极/源极驱动芯片和第二栅极/源极驱动芯片。 第一栅极/源极驱动芯片包括多个第一电荷泵电路，每个第一电荷泵电路具有电压输入端，电压输出端，第一电容器端和第二电容器端。 第二栅极/源极驱动芯片包括多个第二电荷泵电路，每个第二电荷泵电路还具有电压输入端，电压输出端，第一电容器端和第二电容器端。 第一电荷泵电路中的至少一个的电压输出端耦合到至少一个第二电荷泵电路的电压输入端。

公开(公告)号：US09397650B2

公开(公告)日：2016-07-19

申请号：US14684439

申请日：2015-04-13

Applicant: Novatek Microelectronics Corp.

Inventor： Ying-Neng Huang ,  Chih-Yuan Hsieh ,  Jie-Jung Huang ,  Tsung-Yin Yu

IPC: H03K17/687 ,  H03K17/14 ,  H03K19/0175

CPC classification number: H03K17/145 ,  H03K19/017509

Abstract: A gate driving apparatus is disclosed. The gate driving apparatus includes a first gate driving chip and N second gate driving chips, wherein N is positive integer. The first gate driving chip has a first input pin and a first current output pin. The first gate driving chip receives a reference electrical signal by the first input pin, and generates a reference current according to the reference electrical signal. The first current output pin is used for outputting the reference current. Each of the second gate driving chips has a current input pin for receiving the reference current and a second current output pin for outputting the reference current. The first gate driving chip and the second gate driving chips generate at least a first output signal and at least N second output signals according to the reference current.

Abstract translation: 公开了一种门驱动装置。 栅极驱动装置包括第一栅极驱动芯片和N个第二栅极驱动芯片，其中N是正整数。 第一栅极驱动芯片具有第一输入引脚和第一电流输出引脚。 第一栅极驱动芯片由第一输入引脚接收参考电信号，并根据参考电信号产生参考电流。 第一个电流输出引脚用于输出参考电流。 每个第二栅极驱动芯片具有用于接收参考电流的电流输入引脚和用于输出参考电流的第二电流输出引脚。 第一栅极驱动芯片和第二栅极驱动芯片根据参考电流产生至少第一输出信号和至少N个第二输出信号。