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公开(公告)号:US10229619B2
公开(公告)日:2019-03-12
申请号:US15229310
申请日:2016-08-05
发明人: Yuebai Han , Xinxin Jin , Xiaopeng Bai , Shanshan Bao , Pucha Zhao , Jin Zhao , Hongwei Gao , Mingyang Zhang , Tao Yang
IPC分类号: G09G3/00 , G09G3/3225 , G09G3/3266 , H01L51/00 , H01L27/32
摘要: Embodiments of the present disclosure provide a test circuit, a test method, a display panel and a display apparatus. Each of the signal input terminals may input a plurality of signals in a time division multiplexed manner, and in turn may be controlled by the corresponding switches to form a plurality of signal lines, a signal flow of the plurality of signal lines are totally different from each other under control of the switches. For example, one of the signal lines may function as a signal input line, and the other one of the signal lines may function as a signal input line for other specific testing, such as aging process so as to input signals different from the normal turn-on state signals. Consequently, by controlling the corresponding switches through the control signal terminals so that different input signals pass through different signal lines into the display panel to meet testing requirements of normal turn-on state testing, aging process and so on for the display panel. With respect to the prior art, the testing signals may be input without passing through a shift register unit, which avoids damage of a specific testing signal such as aging signal on the shift register unit and ensure a normal displaying function of the display panel.
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公开(公告)号:US10412826B2
公开(公告)日:2019-09-10
申请号:US15944206
申请日:2018-04-03
发明人: Pucha Zhao , Guoqing Zhang , Xiaopeng Bai , Hongwei Gao , Weifeng Wang , Yanbin Dang , Haotian Chen
IPC分类号: H01H85/046 , H05K3/30 , H05K1/02
摘要: The present application discloses a circuit board and a method for manufacturing the same, and a terminal test device. The circuit board includes a base substrate, and a plurality of conductive lines on the base substrate, each of the plurality of conductive lines having one end configured to be connected with a signal output bus of a signal generator and the other end configured to be connected with a terminal. A fuse is connected in series in each conductive line, and a breaking current IT of the fuse, a maximum operating current I of the conductive line and a fault current IF of the conductive line satisfy: I
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公开(公告)号:US11232727B2
公开(公告)日:2022-01-25
申请号:US16466328
申请日:2018-10-31
发明人: Pucha Zhao , Guoqing Zhang , Xiaopeng Bai , Weifeng Wang , Yanbin Dang , Zhixin Guo , Xingliang Wang , Haotian Chen
摘要: A substrate, a panel, a detection device and an alignment detection method are provided. The substrate includes first signal connection pins arranged in parallel side by side and at least one first alignment detection pin, wherein the at least one first alignment detection pin is located on at least one side of the first signal connection pins in an arrangement direction of the first signal connection pins, and arranged in parallel with the first signal connection pins.
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公开(公告)号:US11099226B2
公开(公告)日:2021-08-24
申请号:US16157302
申请日:2018-10-11
发明人: Hongwei Gao , Guoqing Zhang , Hongxia Yang , Pucha Zhao , Xiaopeng Bai , Ke Zhao , Zhihui Jia , Yan Zong , Xiaowei Wang , Yaorong Liu
IPC分类号: G01R31/26
摘要: A test circuitry and a method for testing the same and a test system are provided. The test circuitry includes: a test signal input end, configured to input an initial test signal; a signal output end, configured to output a target test signal; and a signal shaping circuitry coupled to the test signal input end and the signal output end, configured to remove a noise signal from the initial test signal to obtain the target test signal.
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公开(公告)号:US11018167B2
公开(公告)日:2021-05-25
申请号:US16053460
申请日:2018-08-02
发明人: Ke Zhao , Guoqing Zhang , Hongwei Gao , Xiaowei Wang , Zhihui Jia , Yan Zong , Longfei Yang , Hongxia Yang , Meili Guo , Weifeng Wang , Pucha Zhao , Zhixin Guo
IPC分类号: G09G3/3233 , H01L27/32 , H01L51/56 , H01L21/66 , H01L27/12
摘要: The present disclosure relates to a method and system for performing aging process on the transistor in the display panel. A method for performing aging process on a transistor in a display panel, comprising: obtaining an initial characteristic curve of the transistor; determining an initial cutoff voltage range of the transistor according to the obtained initial characteristic curve; determining a gate-source voltage and a drain-source voltage required by the transistor according to the initial cutoff voltage range, so as to increase an cutoff voltage range of the transistor; and performing aging process on the transistor according to the determined required gate-source voltage and drain-source voltage.
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公开(公告)号:US10510278B2
公开(公告)日:2019-12-17
申请号:US16213210
申请日:2018-12-07
发明人: Weifeng Wang , Guoqing Zhang , Hongxia Yang , Yu Fu , Xingliang Wang , Zhixin Guo , Yanbin Dang , Xiaowei Wang , Jie Wu , Feiwen Tian , Pucha Zhao , Chenwei Wang , Xuepeng Ji
摘要: The present disclosure provides a signal loading method and a signal generator. The signal loading method includes: loading a first pair of voltage signals to at least one pair of separate signal channels for a time period, respectively, wherein the first pair of voltage signals have a first voltage difference therebetween; and determining whether a short circuit occurs in the at least one pair of signal channels within the time period, and if it is determined that no short circuit occurs in the at least one pair of signal channels within the time period, loading a second pair of voltage signals having a second voltage difference therebetween to the at least one pair of signal channels at the end of the time period. The second voltage difference is greater than the first voltage difference.
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公开(公告)号:US20190237019A1
公开(公告)日:2019-08-01
申请号:US16138603
申请日:2018-09-21
发明人: Hongwei Gao , Xiaowei Wang , Yaorong Liu , Zhihui Jia , Yan Zong , Ke Zhao , Hongxia Yang , Guoqing Zhang , Pucha Zhao , Xiaopeng Bai
IPC分类号: G09G3/3258 , G09G3/3291
CPC分类号: G09G3/3258 , G09G3/3291 , G09G2300/0426 , G09G2300/043 , G09G2330/12
摘要: A set of measurement voltages having different voltage values are subsequently inputted to a measurement voltage input terminal of the pixel driving circuit, a light emitting state of a light emitting device under each measurement voltage is detected, and it is determined whether a storage capacitor in the pixel driving circuit is normal based on the light emitting state of the light emitting device.
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公开(公告)号:US20170200404A1
公开(公告)日:2017-07-13
申请号:US15229310
申请日:2016-08-05
发明人: Yuebai Han , Xinxin Jin , Xiaopeng Bai , Shanshan Bao , Pucha Zhao , Jin Zhao , Hongwei Gao , Mingyang Zhang , Tao Yang
IPC分类号: G09G3/00 , G09G3/3225 , G09G3/3266
CPC分类号: G09G3/006 , G09G3/3225 , G09G3/3266 , G09G2310/0286 , G09G2320/043 , G09G2320/045 , G09G2320/0626 , G09G2330/12 , H01L27/3244 , H01L51/0031 , H01L2251/562
摘要: Embodiments of the present disclosure provide a test circuit, a test method, a display panel and a display apparatus. Each of the signal input terminals may input a plurality of signals in a time division multiplexed manner, and in turn may be controlled by the corresponding switches to form a plurality of signal lines, a signal flow of the plurality of signal lines are totally different from each other under control of the switches. For example, one of the signal lines may function as a signal input line, and the other one of the signal lines may function as a signal input line for other specific testing, such as aging process so as to input signals different from the normal turn-on state signals. Consequently, by controlling the corresponding switches through the control signal terminals so that different input signals pass through different signal lines into the display panel to meet testing requirements of normal turn-on state testing, aging process and so on for the display panel. With respect to the prior art, the testing signals may be input without passing through a shift register unit, which avoids damage of a specific testing signal such as aging signal on the shift register unit and ensure a normal displaying function of the display panel.
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