DELAMINATION-RESISTANT SEMICONDUCTOR DEVICE AND ASSOCIATED METHOD

    公开(公告)号:US20190013279A1

    公开(公告)日:2019-01-10

    申请号:US15642132

    申请日:2017-07-05

    Abstract: A delamination-resistant semiconductor device includes a conductive layer, a semiconductor layer, and a spacer. The conductive layer has a first side opposite a second side. The semiconductor layer is on the first side and defines an aperture therethrough spanned by the conductive layer. The spacer is on the second side and has a top surface, proximate the conductive layer, that defines a blind hole spanned by the conductive layer. A method for preventing delamination of a multilayer structure, includes a step of disposing a first layer on a substrate such that the first layer spans an aperture of the substrate. The method also includes a step of disposing a second layer on the first layer. The second layer has a blind hole adjacent to the first layer such that the first layer spans the blind hole.

    CAVITYLESS CHIP-SCALE IMAGE-SENSOR PACKAGE
    2.
    发明申请

    公开(公告)号:US20200052019A1

    公开(公告)日:2020-02-13

    申请号:US16100835

    申请日:2018-08-10

    Abstract: A cavityless chip-scale image-sensor package includes a substrate, a microlens array, and a low-index layer. The substrate includes a plurality of pixels forming a pixel array. The microlens array includes a plurality of microlenses each (i) having a lens refractive index, (ii) being aligned to a respective one of the plurality of pixels and (iii) having a non-planar microlens surfaces facing away from the respective one of the plurality of pixels. The low-index layer has a first refractive index less than the lens refractive index. The low-index layer also includes a bottom surface, at least part of which is conformal to each non-planar microlens surface. The microlens array is between the pixel array and the low-index layer.

    IMAGE-SENSOR CHIP-SCALE PACKAGE AND METHOD FOR MANUFACTURE

    公开(公告)号:US20210111221A1

    公开(公告)日:2021-04-15

    申请号:US16600047

    申请日:2019-10-11

    Abstract: A method for fabricating an image-sensor chip-scale package includes bonding, with temporary adhesive, a glass wafer to a device wafer including an array of image sensors. The method also includes forming an isolated-die wafer by removing, from the device wafer, each of a plurality of inter-sensor regions each located between a respective pair of image sensors of the array of image sensors. The isolated-die wafer includes a plurality of image-sensor dies each including a respective image sensor, of the array of image sensors, bonded to the glass wafer. The method also includes encapsulating the isolated-die wafer to form an encapsulated-die wafer; removing, from each of the plurality of image-sensor dies, a respective region of the glass wafer covering the respective image sensor; and singulating the encapsulated-die wafer.

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