公开(公告)号：US5838186A

公开(公告)日：1998-11-17

申请号：US880071

申请日：1997-06-20

Applicant: Osamu Inoue ,  Osamu Ara

Inventor： Osamu Inoue ,  Osamu Ara

IPC: H03K17/16 ,  G11C11/409 ,  H03K17/687 ,  H03K19/003 ,  H03K19/0175 ,  H03K5/01

CPC classification number: H03K17/164 ,  H03K19/00361

Abstract: An additional MOS transistor receiving at its control electrode a signal complementary to that applied to control electrodes of MOS transistors is provided between a power supply node and a control electrode line formed by resistors having a significant resistance and interconnecting respective control electrodes of MOS transistors which are connected in parallel and each of which is connected between output signal line and power supply node. When MOS transistors are rendered non-conductive, the additional MOS transistor is rendered conductive. As a result, internal nodes are driven by an inverter and the additional MOS transistor to a power supply voltage, thereby turning off MOS transistors at the same timing. Consequently, through current in a semiconductor output circuit can be suppressed and an output signal has no ringing.

Abstract translation: 在其控制电极处接收与施加到MOS晶体管的控制电极的信号互补的信号的附加MOS晶体管设置在电源节点和由具有显着电阻的电阻器形成的控制电极线和互连MOS晶体管的各个控制电极 并联连接，每个连接在输出信号线和电源节点之间。 当MOS晶体管变为非导通时，附加MOS晶体管导通。 结果，内部节点由逆变器和附加MOS晶体管驱动到电源电压，从而在相同的定时关断MOS晶体管。 因此，可以抑制半导体输出电路中的电流，并且输出信号没有振​​铃。