公开(公告)号：US20140269140A1

公开(公告)日：2014-09-18

申请号：US13826958

申请日：2013-03-14

申请人： PADMARAJ SANJEEVARAO ,  DAVID W. CHRUDIMSKY

发明人： PADMARAJ SANJEEVARAO ,  DAVID W. CHRUDIMSKY

IPC分类号： G11C5/14 ,  G11C8/08

CPC分类号： G11C8/08 ,  G11C16/08

摘要： A word line driver that includes a pull up transistor for biasing a node of a stack of transistors that are located between a high supply voltage terminal and a low supply voltage terminal. The node is biased at a voltage that is between the high supply voltage and the low supply voltage. The stack of transistors includes a stack of decode transistors and a cascode transistor. The cascode transistor is located between the node and a second node of the stack that is coupled to an inverting circuit.

摘要翻译： 一种字线驱动器，其包括用于偏置位于高电源电压端子和低电源电压端子之间的晶体管堆叠的节点的上拉晶体管。 节点偏置在高电源电压和低电源电压之间的电压。 晶体管堆叠包括一堆解码晶体管和共源共栅晶体管。 共源共栅晶体管位于节点和耦合到反相电路的堆叠的第二节点之间。