公开(公告)号：US20200012925A1

公开(公告)日：2020-01-09

申请号：US16454881

申请日：2019-06-27

申请人： POSTECH ACADEMY-INDUSTRY FOUNDATION

发明人： JAE-JOON KIM ,  Jinseok Kim ,  Taesu Kim

IPC分类号： G06N3/063 ,  G06N3/08 ,  G06N5/04

摘要： A neuromorphic system includes an address translation device that translates an address corresponding to each of synaptic weights between presynaptic neurons and postsynaptic neurons to generate a translation address, and a plurality of synapse memories that store the synaptic weights based on the translation address. The translation address is generated such that at least two of synaptic weights corresponding to each of the postsynaptic neurons are stored in different synapse memories of the plurality of synapse memories and such that at least two of synaptic weights corresponding to each of the presynaptic neurons are stored in different synapse memories.

公开(公告)号：US11521046B2

公开(公告)日：2022-12-06

申请号：US16170081

申请日：2018-10-25

申请人： Samsung Electronics Co., Ltd. ,  Postech Academy-Industry Foundation

发明人： Sungho Kim ,  Jinseok Kim ,  Yulhwa Kim ,  Jaejoon Kim ,  Dusik Park ,  Hyungjun Kim

IPC分类号： G06N3/063 ,  G06N3/04

摘要： A method of performing operations on a plurality of inputs and a same kernel using a delay time by using a same processor, and a neural network device thereof are provided, the neural network device includes input data including a first input and a second input, and a processor configured to obtain a first result by performing operations between the first input and a plurality of kernels, to obtain a second result by performing operations between the second input, which is received at a time delayed by a first interval from a time when the first input is received, and the plurality of kernels, and to obtain output data using the first result and the second result. The neural network device may include neuromorphic hardware and may perform convolutional neural network (CNN) mapping.

公开(公告)号：US11681899B2

公开(公告)日：2023-06-20

申请号：US16561378

申请日：2019-09-05

申请人： Samsung Electronics Co., Ltd. ,  POSTECH ACADEMY-INDUSTRY FOUNDATION

发明人： Sungho Kim ,  Yulhwa Kim ,  Hyungjun Kim ,  Jae-Joon Kim ,  Jinseok Kim

IPC分类号： G06N20/00 ,  G06N3/02 ,  G06N3/045 ,  G06N3/08 ,  G06N3/063

CPC分类号： G06N3/045 ,  G06N3/02 ,  G06N3/063 ,  G06N3/08 ,  G06N20/00

摘要： A method of implementing a neural network in a neuromorphic apparatus having a memory and processing circuitry, where the method includes dividing, by the processing circuitry, the neural network into a plurality of sub-networks based on a size of a core of the memory to implement the neural network, initializing, by the processing circuitry, a hyper-parameter used in the sub-networks, and training, by the processing circuitry, the sub-networks by using the hyper-parameter.