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公开(公告)号：US11521046B2
公开(公告)日：2022-12-06
申请号：US16170081
申请日：2018-10-25
发明人： Sungho Kim , Jinseok Kim , Yulhwa Kim , Jaejoon Kim , Dusik Park , Hyungjun Kim
摘要： A method of performing operations on a plurality of inputs and a same kernel using a delay time by using a same processor, and a neural network device thereof are provided, the neural network device includes input data including a first input and a second input, and a processor configured to obtain a first result by performing operations between the first input and a plurality of kernels, to obtain a second result by performing operations between the second input, which is received at a time delayed by a first interval from a time when the first input is received, and the plurality of kernels, and to obtain output data using the first result and the second result. The neural network device may include neuromorphic hardware and may perform convolutional neural network (CNN) mapping.
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2.发明授权公开(公告)号：US11435981B2
公开(公告)日：2022-09-06
申请号：US16847872
申请日：2020-04-14
发明人： Yonghwan Kim , Wook Kim , Jaejoon Kim , Sungju Ryu
摘要： An arithmetic circuit includes an input buffer latching each of a plurality of input signals, sequentially input, and sequentially outputting a plurality of first addition signals and a plurality of second addition signals based on the plurality of input signals; a first ripple carry adder (RCA) performing a first part of an accumulation operation on the first addition signals to generate a carry; a flip-flop; a second RCA performing a second part of the accumulation operation on the second addition signals and an output of the flop-flop; the first RCA latching the carry in the flip-flop after the accumulation operation is performed; and an output buffer latching an output signal of the first RCA and an output signal of the second RCA, and outputting a sum signal representing a sum of the plurality of input signals.
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