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1.发明授权Memory bus architecture for concurrently supporting volatile and non-volatile memory modules 有权用于同时支持易失性和非易失性存储器模块的内存总线架构公开(公告)号：US08583869B2
公开(公告)日：2013-11-12
申请号：US13082312
申请日：2011-04-07
Applicant: Jonathan R. Hinkle , Paul Sweere
Inventor： Jonathan R. Hinkle , Paul Sweere
IPC: G06F12/00
CPC classification number: G06F13/20 , G06F12/0246 , G06F13/1668 , G06F13/1684 , G06F13/1694 , G06F2212/205 , G11C5/04
Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.
Abstract translation: 提供了一个存储器/存储模块，它实现与双数据速率兼容插座上的串行高级技术附件（SATA）或串行连接SCSI（SAS）信号兼容的固态驱动器。 可拆卸子卡可以耦合到存储器模块，用于将存储器总线电压转换为存储器模块上的存储器件的第二电压。 此外，提供了主机系统上的混合存储器总线，其支持DDR兼容存储器模块和/或SATA / SAS兼容存储器模块。 在一个示例中，存储器/存储模块耦合到第一总线（DDR3兼容插座）以获得电压和/或其他信号，但是使用第二总线进行数据传输。 在另一示例中，存储器模块可以重新调整/重新使用通常携带非数据信号的电路径，以用于/从存储/存储模块的数据业务。 用于存储/存储模块的这种数据业务允许同一存储器总线上的其他存储器模块的并发数据通信。
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2.发明申请METHOD AND APPARATUS FOR SUPPORTING STORAGE MODULES IN STANDARD MEMORY AND/OR HYBRID MEMORY BUS ARCHITECTURES 有权在标准存储器和/或混合存储器总线架构中支持存储模块的方法和装置公开(公告)号：US20110153903A1
公开(公告)日：2011-06-23
申请号：US12975347
申请日：2010-12-21
Applicant: Jonathan R. Hinkle , Paul Sweere
Inventor： Jonathan R. Hinkle , Paul Sweere
IPC: G06F13/20
CPC classification number: G06F13/20 , G06F12/0246 , G06F13/1668 , G06F13/1684 , G06F13/1694 , G06F2212/205 , G11C5/04
Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.
Abstract translation: 提供了一个存储器/存储模块，它实现与双数据速率兼容插座上的串行高级技术附件（SATA）或串行连接SCSI（SAS）信号兼容的固态驱动器。 可拆卸子卡可以耦合到存储器模块，用于将存储器总线电压转换为存储器模块上的存储器件的第二电压。 此外，提供了主机系统上的混合存储器总线，其支持DDR兼容存储器模块和/或SATA / SAS兼容存储器模块。 在一个示例中，存储器/存储模块耦合到第一总线（DDR3兼容插座）以获得电压和/或其他信号，但是使用第二总线进行数据传输。 在另一示例中，存储器模块可以重新调整/重新使用通常携带非数据信号的电路径，以用于/从存储/存储模块的数据业务。 用于存储/存储模块的这种数据业务允许同一存储器总线上的其他存储器模块的并发数据通信。
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公开(公告)号：US20100008175A1
公开(公告)日：2010-01-14
申请号：US12500471
申请日：2009-07-09
Applicant: Paul Sweere , Jonathan R. Hinkle
Inventor： Paul Sweere , Jonathan R. Hinkle
IPC: G11C5/14
CPC classification number: G11C5/141 , G06F11/1441 , G06F12/0866 , G11C5/14 , G11C5/143 , G11C11/005 , Y02D10/13
Abstract: A memory module is provided comprising a substrate having an interface to a host system, volatile memory, non-volatile memory, and a logic device. The logic device may receive the indicator of an external triggering event and copies data from the volatile memory devices to the non-volatile memory devices upon receipt of such indicator. When the indicator of the triggering event has cleared, the logic device restores the data from the non-volatile to the volatile memory devices. The memory module may include a passive backup power source (e.g., super-capacitor) that is charged by an external power source and temporarily provides power to the memory module to copy the data from volatile to non-volatile memory. A voltage detector within the memory module may monitor the voltage of an external power source and generates an indicator of a power loss event if voltage of the external power source falls below a threshold level.
Abstract translation: 提供了一种存储器模块，其包括具有与主机系统，易失性存储器，非易失性存储器和逻辑器件的接口的衬底。 逻辑设备可以接收外部触发事件的指示符，并且在接收到这样的指示器时将数据从易失性存储器设备复制到非易失性存储器设备。 当触发事件的指示符已经清除时，逻辑器件将数据从非易失性恢复到易失性存储器件。 存储器模块可以包括被外部电源充电的无源备用电源（例如超级电容器），并且暂时向存储器模块提供电力以将数据从易失性存储器复制到非易失性存储器。 存储器模块内的电压检测器可以监视外部电源的电压，并且如果外部电源的电压低于阈值电平，则产生功率损失事件的指示器。
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公开(公告)号：US08325554B2
公开(公告)日：2012-12-04
申请号：US12500471
申请日：2009-07-09
Applicant: Paul Sweere , Jonathan R. Hinkle
Inventor： Paul Sweere , Jonathan R. Hinkle
IPC: G11C5/14
CPC classification number: G11C5/141 , G06F11/1441 , G06F12/0866 , G11C5/14 , G11C5/143 , G11C11/005 , Y02D10/13
Abstract: A memory module is provided comprising a substrate having an interface to a host system, volatile memory, non-volatile memory, and a logic device. The logic device may receive the indicator of an external triggering event and copies data from the volatile memory devices to the non-volatile memory devices upon receipt of such indicator. When the indicator of the triggering event has cleared, the logic device restores the data from the non-volatile to the volatile memory devices. The memory module may include a passive backup power source (e.g., super-capacitor) that is charged by an external power source and temporarily provides power to the memory module to copy the data from volatile to non-volatile memory. A voltage detector within the memory module may monitor the voltage of an external power source and generates an indicator of a power loss event if voltage of the external power source falls below a threshold level.
Abstract translation: 提供了一种存储器模块，其包括具有与主机系统，易失性存储器，非易失性存储器和逻辑器件的接口的衬底。 逻辑设备可以接收外部触发事件的指示符，并且在接收到这样的指示器时将数据从易失性存储器设备复制到非易失性存储器设备。 当触发事件的指示符已经清除时，逻辑器件将数据从非易失性恢复到易失性存储器件。 存储器模块可以包括被外部电源充电的无源备用电源（例如超级电容器），并且暂时向存储器模块提供电力以将数据从易失性存储器复制到非易失性存储器。 存储器模块内的电压检测器可以监视外部电源的电压，并且如果外部电源的电压低于阈值电平，则产生功率损失事件的指示器。
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5.发明授权Memory bus architecture for concurrently supporting volatile and non-volatile memory modules 有权用于同时支持易失性和非易失性存储器模块的内存总线架构公开(公告)号：US08656072B2
公开(公告)日：2014-02-18
申请号：US13236416
申请日：2011-09-19
Applicant: Jonathan R. Hinkle , Paul Sweere
Inventor： Jonathan R. Hinkle , Paul Sweere
CPC classification number: G06F13/20 , G06F12/0246 , G06F13/1668 , G06F13/1684 , G06F13/1694 , G06F2212/205 , G11C5/04
Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.
Abstract translation: 提供了一个存储器/存储模块，它实现与双数据速率兼容插座上的串行高级技术附件（SATA）或串行连接SCSI（SAS）信号兼容的固态驱动器。 可拆卸子卡可以耦合到存储器模块，用于将存储器总线电压转换为存储器模块上的存储器件的第二电压。 此外，提供了主机系统上的混合存储器总线，其支持DDR兼容存储器模块和/或SATA / SAS兼容存储器模块。 在一个示例中，存储器/存储模块耦合到第一总线（DDR3兼容插座）以获得电压和/或其他信号，但是使用第二总线进行数据传输。 在另一示例中，存储器模块可以重新调整/重新使用通常携带非数据信号的电路径，以用于/从存储/存储模块的数据业务。 用于存储/存储模块的这种数据业务允许同一存储器总线上的其他存储器模块的并发数据通信。
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Patent Agency Ranking
6.发明申请MEMORY CONTROLLER SUPPORTING CONCURRENT VOLATILE AND NONVOLATILE MEMORY MODULES IN A MEMORY BUS ARCHITECTURE 有权内存控制器在内存总线架构中支持同时存在的易失性和非易失性存储器模块公开(公告)号：US20120059970A1
公开(公告)日：2012-03-08
申请号：US13082383
申请日：2011-04-07
Applicant: Jonathan R. Hinkle , Paul Sweere
Inventor： Jonathan R. Hinkle , Paul Sweere
IPC: G06F13/16
CPC classification number: G06F13/20 , G06F12/0246 , G06F13/1668 , G06F13/1684 , G06F13/1694 , G06F2212/205 , G11C5/04
Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.
Abstract translation: 提供了一个存储器/存储模块，它实现与双数据速率兼容插座上的串行高级技术附件（SATA）或串行连接SCSI（SAS）信号兼容的固态驱动器。 可拆卸子卡可以耦合到存储器模块，用于将存储器总线电压转换为存储器模块上的存储器件的第二电压。 此外，提供了主机系统上的混合存储器总线，其支持DDR兼容存储器模块和/或SATA / SAS兼容存储器模块。 在一个示例中，存储器/存储模块耦合到第一总线（DDR3兼容插座）以获得电压和/或其他信号，但是使用第二总线进行数据传输。 在另一示例中，存储器模块可以重新调整/重新使用通常携带非数据信号的电路径，以用于/从存储/存储模块的数据业务。 用于存储/存储模块的这种数据业务允许同一存储器总线上的其他存储器模块的并发数据通信。
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7.发明申请MEMORY BUS ARCHITECTURE FOR CONCURRENTLY SUPPORTING VOLATILE AND NON-VOLATILE MEMORY MODULES 有权用于同时支持挥发性和非易失性存储器模块的存储总线架构公开(公告)号：US20120059967A1
公开(公告)日：2012-03-08
申请号：US13082312
申请日：2011-04-07
Applicant: Jonathan R. Hinkle , Paul Sweere
Inventor： Jonathan R. Hinkle , Paul Sweere
CPC classification number: G06F13/20 , G06F12/0246 , G06F13/1668 , G06F13/1684 , G06F13/1694 , G06F2212/205 , G11C5/04
Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.
Abstract translation: 提供了一个存储器/存储模块，它实现与双数据速率兼容插座上的串行高级技术附件（SATA）或串行连接SCSI（SAS）信号兼容的固态驱动器。 可拆卸子卡可以耦合到存储器模块，用于将存储器总线电压转换为存储器模块上的存储器件的第二电压。 此外，提供了主机系统上的混合存储器总线，其支持DDR兼容存储器模块和/或SATA / SAS兼容存储器模块。 在一个示例中，存储器/存储模块耦合到第一总线（DDR3兼容插座）以获得电压和/或其他信号，但是使用第二总线进行数据传输。 在另一示例中，存储器模块可以重新调整/重新使用通常携带非数据信号的电路径，以用于/从存储/存储模块的数据业务。 用于存储/存储模块的这种数据业务允许同一存储器总线上的其他存储器模块的并发数据通信。
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8.发明授权Method and apparatus for supporting storage modules in standard memory and/or hybrid memory bus architectures 有权用于在标准存储器和/或混合存储器总线架构中支持存储模块的方法和装置公开(公告)号：US09390035B2
公开(公告)日：2016-07-12
申请号：US12975347
申请日：2010-12-21
Applicant: Jonathan R. Hinkle , Paul Sweere
Inventor： Jonathan R. Hinkle , Paul Sweere
CPC classification number: G06F13/20 , G06F12/0246 , G06F13/1668 , G06F13/1684 , G06F13/1694 , G06F2212/205 , G11C5/04
Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.
Abstract translation: 提供了一个存储器/存储模块，它实现与双数据速率兼容插座上的串行高级技术附件（SATA）或串行连接SCSI（SAS）信号兼容的固态驱动器。 可拆卸子卡可以耦合到存储器模块，用于将存储器总线电压转换为存储器模块上的存储器件的第二电压。 此外，提供了主机系统上的混合存储器总线，其支持DDR兼容存储器模块和/或SATA / SAS兼容存储器模块。 在一个示例中，存储器/存储模块耦合到第一总线（DDR3兼容插座）以获得电压和/或其他信号，但是使用第二总线进行数据传输。 在另一示例中，存储器模块可以重新调整/重新使用通常携带非数据信号的电路径，以用于/从存储/存储模块的数据业务。 用于存储/存储模块的这种数据业务允许同一存储器总线上的其他存储器模块的并发数据通信。
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9.发明授权Memory controller supporting concurrent volatile and nonvolatile memory modules in a memory bus architecture 有权内存控制器支持内存总线架构中的并发易失性和非易失性内存模块公开(公告)号：US09158716B2
公开(公告)日：2015-10-13
申请号：US13082383
申请日：2011-04-07
Applicant: Jonathan R. Hinkle , Paul Sweere
Inventor： Jonathan R. Hinkle , Paul Sweere
CPC classification number: G06F13/20 , G06F12/0246 , G06F13/1668 , G06F13/1684 , G06F13/1694 , G06F2212/205 , G11C5/04
Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.
Abstract translation: 提供了一个存储器/存储模块，它实现与双数据速率兼容插座上的串行高级技术附件（SATA）或串行连接SCSI（SAS）信号兼容的固态驱动器。 可拆卸子卡可以耦合到存储器模块，用于将存储器总线电压转换为存储器模块上的存储器件的第二电压。 此外，提供了主机系统上的混合存储器总线，其支持DDR兼容存储器模块和/或SATA / SAS兼容存储器模块。 在一个示例中，存储器/存储模块耦合到第一总线（DDR3兼容插座）以获得电压和/或其他信号，但是使用第二总线进行数据传输。 在另一示例中，存储器模块可以重新调整/重新使用通常携带非数据信号的电路径，以用于/从存储/存储模块的数据业务。 用于存储/存储模块的这种数据业务允许同一存储器总线上的其他存储器模块的并发数据通信。
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10.发明申请公开(公告)号：US20120159045A1
公开(公告)日：2012-06-21
申请号：US13236416
申请日：2011-09-19
Applicant: Jonathan R. Hinkle , Paul Sweere
Inventor： Jonathan R. Hinkle , Paul Sweere
IPC: G06F12/00
CPC classification number: G06F13/20 , G06F12/0246 , G06F13/1668 , G06F13/1684 , G06F13/1694 , G06F2212/205 , G11C5/04
Abstract: A memory/storage module is provided that implements a solid state drive compatible with Serial Advanced Technology Attachment (SATA) or Serial Attached SCSI (SAS) signaling on a double-data-rate compatible socket. A detachable daughter card may be coupled to the memory module for converting a memory bus voltage to a second voltage for memory devices on the memory module. Additionally, a hybrid memory bus on a host system is provided that supports either DDR-compatible memory modules and/or SATA/SAS-compatible memory modules. In one example, the memory/storage module couples to a first bus (DDR3 compatible socket) to obtain voltage and/or other signals, but uses a second bus for data transfers. In another example, the memory module may repurpose/reuse electrical paths that typically carry non-data signals for data traffic to/from the memory/storage module. Such data traffic for the memory/storage module permits concurrent data traffic for other memory modules on the same memory bus.
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