Bus transaction verification method
    1.
    发明授权
    Bus transaction verification method 失效
    总线交易验证方法

    公开(公告)号:US06684277B2

    公开(公告)日:2004-01-27

    申请号:US09770584

    申请日:2001-01-26

    IPC分类号: G06F1300

    CPC分类号: G06F13/423

    摘要: The present invention provides a method and computer readable medium with program instructions for automatically verifying bus transactions. The method includes: parsing a parameter code for the bus transactions, wherein the parameter code comprises a plurality of expected parameter values for the bus transactions; automatically integrating the parsed parameter code into a checking program; and automatically executing the checking program, wherein the checking program compares the plurality of expected parameter values with a plurality of actual parameter values for the bus transactions. The bus transaction verification method in accordance with the present invention automates the coding of expected parameter values for each test case into a checking program and automates the execution of the checking program, where the checking program compares the expected parameter values with the actual parameter values. By automating the bus transaction verification in this manner, the process is more efficient and reduces the chances of human error and inaccurate observation.

    摘要翻译: 本发明提供一种具有用于自动验证总线事务的程序指令的方法和计算机可读介质。 该方法包括:解析总线事务的参数代码,其中参数代码包括用于总线事务的多个预期参数值; 自动将解析的参数代码集成到检查程序中; 并且自动执行所述检查程序,其中所述检查程序将所述多个预期参数值与所述总线事务的多个实际参数值进行比较。 根据本发明的总线事务验证方法将每个测试用例的期望参数值的编码自动化到检查程序中,并自动执行检查程序,其中检查程序将预期参数值与实际参数值进行比较。 通过以这种方式自动化总线事务验证,该过程更有效,并且减少人为错误和不准确的观察的机会。

    Method and system for measuring and reporting test coverage of logic designs
    3.
    发明授权
    Method and system for measuring and reporting test coverage of logic designs 有权
    测量和报告逻辑设计测试覆盖的方法和系统

    公开(公告)号:US06718521B1

    公开(公告)日:2004-04-06

    申请号:US09638528

    申请日:2000-08-14

    IPC分类号: G06F1750

    CPC分类号: G06F17/5022

    摘要: A method and system for easily and automatically determining the extent of test coverage for a design-under-test (DUT). Incremental test coverage information is gathered from the application of test cases to the DUT, and cumulative test coverage information is maintained. The incremental test coverage and cumulative test coverage information are fed into a correlation process, which correlates valid bus transactions automatically generated from a configuration file describing the DUT with the incremental and cumulative test coverage information. The correlation process determines which valid bus transactions have or have not been applied in testing the DUT.

    摘要翻译: 一种用于轻松自动确定被测设计(DUT)测试覆盖范围的方法和系统。 增量测试覆盖信息从应用测试用例收集到DUT,并保持累积测试覆盖信息。 增量测试覆盖率和累积测试覆盖率信息被馈送到相关过程,其将从描述DUT的配置文件自动生成的有效总线事务与增量和累积测试覆盖信息相关联。 相关过程确定哪些有效总线事务已经或未被应用于测试DUT。