Data processing system with latch for sharing instruction fields
    2.
    发明授权
    Data processing system with latch for sharing instruction fields 失效
    具有锁存器的数据处理系统,用于共享指令字段

    公开(公告)号:US4404629A

    公开(公告)日:1983-09-13

    申请号:US228441

    申请日:1981-01-26

    CPC分类号: G06F9/265

    摘要: A microprocessor, having a memory element containing a plurality of multi-bit instruction words, an arithmetic logic (ALU) unit coupled to the memory element and responsive to at least a portion of each of the instruction words for performing data manipulations, and a controller for generating address signals that are communicated to the memory element to cause sequential access of the instruction words, includes a storage element that interconnects certain of the signal lines that communicate the instruction words to the ALU to the controller. In response to a first predetermined instruction word the storage element receives and stores the portion of the instruction word being conducted to the ALU. In response to a second predetermined instruction word, the content of the storage element is transferred to the controller to form an address signal.

    摘要翻译: 一种具有包含多个多位指令字的存储元件的微处理器,耦合到该存储器元件并且响应每个指令字的至少一部分以执行数据操作的算术逻辑(ALU)单元,以及控制器 用于产生传送到存储器元件以引起指令字的顺序存取的地址信号,包括将某些信号线与ALU传送给控制器的存储元件。 响应于第一预定指令字,存储元件接收并存储被传送到ALU的指令字的部分。 响应于第二预定指令字,存储元件的内容被传送到控制器以形成地址信号。