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    Compute work distribution reference counters
    1.
    发明授权
    Compute work distribution reference counters 有权
    计算工作分配参考计数器

    公开(公告)号：US09507638B2

    公开(公告)日：2016-11-29

    申请号：US13291369

    申请日：2011-11-08

    申请人： Philip Alexander Cuadra ,  Karim M. Abdalla ,  Jerome F. Duluk, Jr. ,  Luke Durant ,  Gerald F. Luiz ,  Timothy John Purcell ,  Lacky V. Shah

    发明人： Philip Alexander Cuadra ,  Karim M. Abdalla ,  Jerome F. Duluk, Jr. ,  Luke Durant ,  Gerald F. Luiz ,  Timothy John Purcell ,  Lacky V. Shah

    IPC分类号： G06F9/455 ,  G06F9/50

    CPC分类号： G06F9/5022

    摘要： One embodiment of the present invention sets forth a technique for managing the allocation and release of resources during multi-threaded program execution. Programmable reference counters are initialized to values that limit the amount of resources for allocation to tasks that share the same reference counter. Resource parameters are specified for each task to define the amount of resources allocated for consumption by each array of execution threads that is launched to execute the task. The resource parameters also specify the behavior of the array for acquiring and releasing resources. Finally, during execution of each thread in the array, an exit instruction may be configured to override the release of the resources that were allocated to the array. The resources may then be retained for use by a child task that is generated during execution of a thread.

    摘要翻译： 本发明的一个实施例提出了一种用于在多线程程序执行期间管理资源的分配和释放的技术。 可编程参考计数器被初始化为限制用于分配给共享相同引用计数器的任务的资源量的值。 为每个任务指定资源参数，以定义为执行任务启动的每个执行线程数组分配的消耗资源量。 资源参数还指定数组用于获取和释放资源的行为。 最后，在执行阵列中的每个线程时，可以将退出指令配置为覆盖分配给阵列的资源的释放。 然后可以保留资源以供执行线程期间生成的子任务使用。

    Scheduling and execution of compute tasks
    4.
    发明授权
    Scheduling and execution of compute tasks 有权
    计划任务的计划和执行

    公开(公告)号：US09069609B2

    公开(公告)日：2015-06-30

    申请号：US13353150

    申请日：2012-01-18

    申请人： Karim M. Abdalla ,  Lacky V. Shah ,  Jerome F. Duluk, Jr. ,  Timothy John Purcell ,  Tanmoy Mandal ,  Gentaro Hirota

    发明人： Karim M. Abdalla ,  Lacky V. Shah ,  Jerome F. Duluk, Jr. ,  Timothy John Purcell ,  Tanmoy Mandal ,  Gentaro Hirota

    IPC分类号： G06F9/46 ,  G06F9/48 ,  G06F9/50

    CPC分类号： G06F9/4881 ,  G06F9/4806 ,  G06F9/50 ,  G06F2209/483

    摘要： One embodiment of the present invention sets forth a technique for assigning a compute task to a first processor included in a plurality of processors. The technique involves analyzing each compute task in a plurality of compute tasks to identify one or more compute tasks that are eligible for assignment to the first processor, where each compute task is listed in a first table and is associated with a priority value and an allocation order that indicates relative time at which the compute task was added to the first table. The technique further involves selecting a first task compute from the identified one or more compute tasks based on at least one of the priority value and the allocation order, and assigning the first compute task to the first processor for execution.

    摘要翻译： 本发明的一个实施例提出了一种用于将计算任务分配给包括在多个处理器中的第一处理器的技术。 该技术涉及分析多个计算任务中的每个计算任务以识别符合分配给第一处理器的一个或多个计算任务，其中每个计算任务在第一表中列出并且与优先级值和分配 指示将计算任务添加到第一个表的相对时间的顺序。 该技术还包括基于优先级值和分配顺序中的至少一个从所识别的一个或多个计算任务中选择第一任务计算，以及将第一计算任务分配给第一处理器以供执行。

    Compute task state encapsulation
    9.
    发明授权
    Compute task state encapsulation 有权

    公开(公告)号：US10795722B2

    公开(公告)日：2020-10-06

    申请号：US13292951

    申请日：2011-11-09

    申请人： Jerome F. Duluk, Jr. ,  Lacky V. Shah ,  Sean J. Treichler

    发明人： Jerome F. Duluk, Jr. ,  Lacky V. Shah ,  Sean J. Treichler

    IPC分类号： G06F9/48 ,  G06F9/46 ,  G06F9/50

    摘要： One embodiment of the present invention sets forth a technique for encapsulating compute task state that enables out-of-order scheduling and execution of the compute tasks. The scheduling circuitry organizes the compute tasks into groups based on priority levels. The compute tasks may then be selected for execution using different scheduling schemes. Each group is maintained as a linked list of pointers to compute tasks that are encoded as task metadata (TMD) stored in memory. A TMD encapsulates the state and parameters needed to initialize, schedule, and execute a compute task.

    Inter-shader attribute buffer optimization
    10.
    发明授权
    Inter-shader attribute buffer optimization 有权
    内部着色器属性缓冲区优化

    公开(公告)号：US08619087B2

    公开(公告)日：2013-12-31

    申请号：US12895579

    申请日：2010-09-30

    申请人： Jerome F. Duluk, Jr. ,  Gernot Schaufler

    发明人： Jerome F. Duluk, Jr. ,  Gernot Schaufler

    IPC分类号： G06T1/20

    CPC分类号： G06T1/20 ,  G06F9/3851 ,  G06F9/3887 ,  G06T15/005 ,  G06T2210/04 ,  G06T2210/52

    摘要： One embodiment of the present invention sets forth a technique for reducing the amount of memory required to store vertex data processed within a processing pipeline that includes a plurality of shading engines. The method includes determining a first active shading engine and a second active shading engine included within the processing pipeline, wherein the second active shading engine receives vertex data output by the first active shading engine. An output map is received and indicates one or more attributes that are included in the vertex data and output by the first active shading engine. An input map is received and indicates one or more attributes that are included in the vertex data and received by the second active shading engine from the first active shading engine. Then, a buffer map is generated based on the input map, the output map, and a pre-defined set of rules that includes rule data associated with both the first shading engine and the second shading engine, wherein the buffer map indicates one or more attributes that are included in the vertex data and stored in a memory that is accessible by both the first active shading engine and the second active shading engine.

    摘要翻译： 本发明的一个实施例提出了一种用于减少存储在包括多个着色引擎的处理流水线中处理的顶点数据所需的存储量的技术。 该方法包括确定包括在处理流水线内的第一主动着色引擎和第二主动着色引擎，其中第二主动着色引擎接收由第一主动着色引擎输出的顶点数据。 接收输出图，并指示包含在顶点数据中并由第一主动着色引擎输出的一个或多个属性。 接收输入图，并且指示包括在顶点数据中并由第二主动着色引擎从第一主动着色引擎接收的一个或多个属性。 然后，基于输入映射，输出映射和包括与第一着色引擎和第二着色引擎相关联的规则数据的预定义的规则集合生成缓冲器映射，其中缓冲器映射指示一个或多个 包括在顶点数据中并存储在可由第一主动着色引擎和第二主动着色引擎访问的存储器中的属性。