OXIDE SEMICONDUCTOR-BASED FRAM
    1.
    发明申请

    公开(公告)号:US20230071750A1

    公开(公告)日:2023-03-09

    申请号:US17486871

    申请日:2021-09-27

    IPC分类号: G11C11/22 H01L27/11507

    摘要: An oxide semiconductor based FRAM is provided in the present invention, including a substrate, a write electrode on the substrate, a ferroelectric dielectric layer on the write electrode, an oxide semiconductor layer on the ferroelectric dielectric layer, a source and a drain respectively on the oxide semiconductor layer and spaced apart at a distance, wherein the source and the drain are further connected to a plate line and a bit line respectively, a gate insulating layer on the source, the drain and the oxide semiconductor layer, and a word line on the gate insulating layer, wherein the word line, the oxide semiconductor layer, the ferroelectric dielectric layer and the write electrode overlapping each other in a direction vertical to the substrate.

    FERROELECTRIC MEMORY STRUCTURE
    2.
    发明申请

    公开(公告)号:US20230137738A1

    公开(公告)日:2023-05-04

    申请号:US17537519

    申请日:2021-11-30

    摘要: A ferroelectric memory structure including a substrate, a ferroelectric capacitor structure, and a switch device is provided. The ferroelectric capacitor structure is disposed on the substrate. The ferroelectric capacitor structure includes at least one first electrode, first dielectric layers, a second electrode, and a ferroelectric material layer. The at least one first electrode and the first dielectric layers are alternately stacked. The second electrode penetrates through the first electrode. The ferroelectric material layer is disposed between the first electrode and the second electrode. The switch device is electrically connected to the ferroelectric capacitor structure.

    Oxide semiconductor-based FRAM
    3.
    发明授权

    公开(公告)号:US11610621B1

    公开(公告)日:2023-03-21

    申请号:US17486871

    申请日:2021-09-27

    IPC分类号: G11C11/22 H01L27/11507

    摘要: An oxide semiconductor based FRAM is provided in the present invention, including a substrate, a write electrode on the substrate, a ferroelectric dielectric layer on the write electrode, an oxide semiconductor layer on the ferroelectric dielectric layer, a source and a drain respectively on the oxide semiconductor layer and spaced apart at a distance, wherein the source and the drain are further connected to a plate line and a bit line respectively, a gate insulating layer on the source, the drain and the oxide semiconductor layer, and a word line on the gate insulating layer, wherein the word line, the oxide semiconductor layer, the ferroelectric dielectric layer and the write electrode overlapping each other in a direction vertical to the substrate.

    FERROELECTRIC MEMORY STRUCTURE
    4.
    发明申请

    公开(公告)号:US20230038759A1

    公开(公告)日:2023-02-09

    申请号:US17403871

    申请日:2021-08-16

    IPC分类号: H01L27/11507

    摘要: A ferroelectric memory structure including a first conductive line, a second conductive line, and a memory cell is provided. The second conductive line is disposed on the first conductive line. The memory cell is disposed between the first and second conductive lines. The memory cell includes a switch device and a ferroelectric capacitor structure. The switch device is disposed between the first and second conductive lines. The ferroelectric capacitor structure is disposed between the first conductive line and the switch device. The ferroelectric capacitor structure includes ferroelectric capacitors electrically connected. Each of the ferroelectric capacitors includes a first conductive layer, a second conductive layer, and a ferroelectric material layer. The second conductive layer is disposed on the first conductive layer. The ferroelectric material layer is disposed between the first conductive layer and the second conductive layer. The ferroelectric material layers in the ferroelectric capacitors have different top-view areas.