公开(公告)号：US20120193986A1

公开(公告)日：2012-08-02

申请号：US13071531

申请日：2011-03-25

申请人： Prakash Easwaran ,  Saumitra Singh ,  Rupak Ghayal ,  Amit Premy

发明人： Prakash Easwaran ,  Saumitra Singh ,  Rupak Ghayal ,  Amit Premy

IPC分类号： H02J1/00

CPC分类号： G05F1/67 ,  H01L31/05 ,  H01L31/0504 ,  H02J3/385 ,  H02S50/10 ,  Y02E10/50 ,  Y02E10/58 ,  Y10T307/609 ,  Y10T307/685

摘要： In a solar panel array, each solar panel in a series-connected string has a current source connected across its output terminals. The current source generates a programmable output current equal to the difference of the load current drawn from the panel and the current corresponding to the maximum power point (MPP) of the panel. As a result, each of the panels in the string is operated at its MPP. When the array contains multiple strings connected in parallel, a voltage source is additionally connected in series with each string. The voltage sources are programmable to generate corresponding output voltages to enable operation of each panel in each of the multiple strings at its MPP. Respective control blocks providing the current sources and voltage sources automatically determine the MPP of the corresponding panels. In an embodiment, the control blocks are implemented as DC-DC converters in conjunction with measurement and communication units.

摘要翻译： 在太阳能电池板阵列中，串联串联的每个太阳能电池板具有连接在其输出端子上的电流源。 电流源产生等于从面板吸取的负载电流与对应于面板最大功率点（MPP）的电流的差值的可编程输出电流。 结果，串中的每个面板在其MPP上操作。 当阵列包含并联连接的多个串时，电压源与每个串串连接。 电压源是可编程的，以产生相应的输出电压，以使其在MPP中的多个串中的每一个中能够操作每个面板。 提供电流源和电压源的各个控制块自动确定相应面板的MPP。 在一个实施例中，控制块与测量和通信单元一起被实现为DC-DC转换器。

公开(公告)号：US20120193989A1

公开(公告)日：2012-08-02

申请号：US13071533

申请日：2011-03-25

申请人： Prakash Easwaran ,  Saumitra Singh ,  Rupak Ghayal ,  Amit Premy

发明人： Prakash Easwaran ,  Saumitra Singh ,  Rupak Ghayal ,  Amit Premy

IPC分类号： H02J3/04

CPC分类号： G05F1/67 ,  Y10T307/685

摘要： In a solar panel array that includes a string of series-connected panels, the load current flowing through the string is measured. The peak current (Ipp) of a panel in the string is determined. A current equal to the difference of the load current and the peak current (Ipp) is generated in a current source connected across the output terminals of the panel. The panel is thereby operated at its maximum power point (MPP). To determine the peak current (Ipp) of the panel, the magnitude of current flowing through the panel is iteratively changed and the corresponding power generated by the panel is computed. The change in the current through the panel and the measurement of the corresponding power are repeated until a maximum power is determined as being generated by the panel. The maximum power corresponds to the maximum power point (MPP) and the peak current (Ipp) of the panel.

摘要翻译： 在包括一系列串联连接的面板的太阳能电池板阵列中，测量流过该串的负载电流。 确定字符串中面板的峰值电流（Ipp）。 在连接在面板的输出端子上的电流源中产生等于负载电流和峰值电流（Ipp）差的电流。 因此，面板以其最大功率点（MPP）运行。 为了确定面板的峰值电流（Ipp），流过面板的电流的大小被迭代地改变，并且计算面板产生的对应的功率。 重复通过面板的电流的变化和对应的功率的测量，直到最大功率被确定为由面板产生。 最大功率对应于面板的最大功率点（MPP）和峰值电流（Ipp）。

公开(公告)号：US09285816B2

公开(公告)日：2016-03-15

申请号：US13071531

申请日：2011-03-25

申请人： Prakash Easwaran ,  Saumitra Singh ,  Rupak Ghayal ,  Amit Premy

发明人： Prakash Easwaran ,  Saumitra Singh ,  Rupak Ghayal ,  Amit Premy

IPC分类号： G01J1/20 ,  G05F1/67 ,  H01L31/05 ,  H02S50/10 ,  H02J3/38

CPC分类号： G05F1/67 ,  H01L31/05 ,  H01L31/0504 ,  H02J3/385 ,  H02S50/10 ,  Y02E10/50 ,  Y02E10/58 ,  Y10T307/609 ,  Y10T307/685

摘要： In a solar panel array, each solar panel in a series-connected string has a current source connected across its output terminals. The current source generates a programmable output current equal to the difference of the load current drawn from the panel and the current corresponding to the maximum power point (MPP) of the panel. As a result, each of the panels in the string is operated at its MPP. When the array contains multiple strings connected in parallel, a voltage source is additionally connected in series with each string. The voltage sources are programmable to generate corresponding output voltages to enable operation of each panel in each of the multiple strings at its MPP. Respective control blocks providing the current sources and voltage sources automatically determine the MPP of the corresponding panels. In an embodiment, the control blocks are implemented as DC-DC converters in conjunction with measurement and communication units.

摘要翻译： 在太阳能电池板阵列中，串联串联的每个太阳能电池板具有连接在其输出端子上的电流源。 电流源产生等于从面板吸取的负载电流与对应于面板最大功率点（MPP）的电流的差值的可编程输出电流。 结果，串中的每个面板在其MPP上操作。 当阵列包含并联连接的多个串时，电压源与每个串串连接。 电压源是可编程的，以产生相应的输出电压，以使其在MPP中的多个串中的每一个中能够操作每个面板。 提供电流源和电压源的各个控制块自动确定相应面板的MPP。 在一个实施例中，控制块与测量和通信单元一起被实现为DC-DC转换器。

公开(公告)号：US08618693B2

公开(公告)日：2013-12-31

申请号：US13071533

申请日：2011-03-25

申请人： Prakash Easwaran ,  Saumitra Singh ,  Rupak Ghayal ,  Amit Premy

发明人： Prakash Easwaran ,  Saumitra Singh ,  Rupak Ghayal ,  Amit Premy

IPC分类号： H02J1/00

CPC分类号： G05F1/67 ,  Y10T307/685

摘要： In a solar panel array that includes a string of series-connected panels, the load current flowing through the string is measured. The peak current (Ipp) of a panel in the string is determined. A current equal to the difference of the load current and the peak current (Ipp) is generated in a current source connected across the output terminals of the panel. The panel is thereby operated at its maximum power point (MPP). To determine the peak current (Ipp) of the panel, the magnitude of current flowing through the panel is iteratively changed and the corresponding power generated by the panel is computed. The change in the current through the panel and the measurement of the corresponding power are repeated until a maximum power is determined as being generated by the panel. The maximum power corresponds to the maximum power point (MPP) and the peak current (Ipp) of the panel.

摘要翻译： 在包括一系列串联连接的面板的太阳能电池板阵列中，测量流过该串的负载电流。 确定字符串中面板的峰值电流（Ipp）。 在连接在面板的输出端子上的电流源中产生等于负载电流和峰值电流（Ipp）差的电流。 因此，面板以其最大功率点（MPP）运行。 为了确定面板的峰值电流（Ipp），流过面板的电流的大小被迭代地改变，并且计算面板产生的对应的功率。 重复通过面板的电流的变化和对应的功率的测量，直到最大功率被确定为由面板产生。 最大功率对应于面板的最大功率点（MPP）和峰值电流（Ipp）。

公开(公告)号：US06933868B1

公开(公告)日：2005-08-23

申请号：US10708415

申请日：2004-03-02

申请人： Amit Premy ,  Ganesan Thiagarajan

发明人： Amit Premy ,  Ganesan Thiagarajan

IPC分类号： G01R31/3167 ,  G01R31/3187 ,  H03M1/10 ,  H04B17/00

CPC分类号： G01R31/3187 ,  G01R31/3167 ,  H04B17/0085

摘要： Testing of a mixed signal integrated circuit (IC) potentially in the form of a die using a tested/calibrated integrated circuit. In an embodiment, the mixed signal IC generates an analog signal from a symbol, and transmits the analog signal to the calibrated integrated circuit. The calibrated IC determines a valid symbol corresponding to the signal level (e.g., voltage) of the received analog signal, and determines a deviation of the signal level of the received analog signal from the voltage level corresponding to the valid symbol. The deviation is deemed to represent the degree of defect of the mixed signal IC based on the assumption that the calibrated IC operates accurately. The deviation is used to either discard or qualify/accept the mixed signal IC.

摘要翻译： 使用测试/校准的集成电路测试可能采用模具形式的混合信号集成电路（IC）。 在一个实施例中，混合信号IC从符号生成模拟信号，并将模拟信号发送到校准的集成电路。 校准的IC确定对应于所接收的模拟信号的信号电平（例如电压）的有效符号，并且确定接收到的模拟信号的信号电平与对应于有效符号的电压电平的偏差。 基于校准的IC精确地操作的假设，该偏差被认为表示混合信号IC的缺陷程度。 该偏差用于丢弃或限定/接受混合信号IC。

公开(公告)号：US20050065747A1

公开(公告)日：2005-03-24

申请号：US10677150

申请日：2003-10-01

申请人： Amit Premy ,  Vudutha Suresh Gupta ,  Anupama Agashe ,  Nikila Krishnamoorthy ,  Rubin Parekhji

发明人： Amit Premy ,  Vudutha Suresh Gupta ,  Anupama Agashe ,  Nikila Krishnamoorthy ,  Rubin Parekhji

IPC分类号： G01R27/28 ,  G01R31/00 ,  G01R31/14 ,  G01R31/3167 ,  G01R31/317 ,  G01R31/3185 ,  G06F19/00 ,  G06J1/00

CPC分类号： G06J1/00 ,  G01R31/3167 ,  G01R31/31704 ,  G01R31/3172 ,  G01R31/318533

摘要： A mixed-signal core disclosed herein is designed for efficient concurrent testing analog, mixed-signal, and digital components. One tester may test all components and, thereby, reduce test time without losing full test coverage. An analog module includes all the analog and mixed-signal components of the mixed-signal core, while a first digital module includes digital components required for functional/parametric verification of the mixed-signal components within the analog module. A first virtual boundary connects the analog and the first digital modules to gate the signal transfer during testing. A second digital module includes the remaining digital components of the mixed-signal core, whereby a second virtual boundary separates it from the first digital module. This type of partitioning enables the mixed-signal core to have three modes of operation, wherein the first mode of operation provides digital interface characterization testing of the first and second digital module and analog characterization/trimming testing of the analog module. In the second mode of operation, concurrent testing of the analog module and the first and second digital module is conducted; wherein analog characterization/trimming testing is performed on the analog module and digital interface characterization testing is performed on the first digital module, while SCAN/BIST testing is performed on the second digital module. In the third mode of operation, non-concurrent testing of the analog module, the first digital module, and the second digital module is enabled; wherein SCAN/BIST testing of the first digital module and the second digital module is enabled, while the analog module is powered down.

摘要翻译： 本文公开的混合信号芯片被设计用于有效并发测试模拟，混合信号和数字组件。 一个测试人员可以测试所有组件，从而减少测试时间，而不会损失完整的测试覆盖范围。 模拟模块包括混合信号核心的所有模拟和混合信号组件，而第一数字模块包括模拟量模块内混合信号组件的功能/参数验证所需的数字组件。 第一个虚拟边界将模拟和第一个数字模块连接起来，以在测试期间对信号传输进行门控。 第二数字模块包括混合信号核心的剩余数字分量，由此第二虚拟边界将其与第一数字模块分离。 这种分区使得混合信号核心具有三种操作模式，其中第一操作模式提供第一和第二数字模块的数字接口表征测试以及模拟模块的模拟表征/修整测试。 在第二种操作模式下，对模拟模块和第一和第二数字模块进行并行测试; 其中对模拟模块执行模拟表征/修整测试，并且在第一数字模块上执行数字接口表征测试，同时在第二数字模块上执行扫描/ BIST测试。 在第三种操作模式下，模拟模块，第一个数字模块和第二个数字模块的非并发测试被启用; 其中模拟模块被断电时，启用第一数字模块和第二数字模块的扫描/ BIST测试。

公开(公告)号：US06925408B2

公开(公告)日：2005-08-02

申请号：US10677150

申请日：2003-10-01

申请人： Amit Premy ,  Vudutha V. N. Suresh Gupta ,  Anupama Aniruddha Agashe ,  Nikila Krishnamoorthy ,  Rubin A. Parekhji

发明人： Amit Premy ,  Vudutha V. N. Suresh Gupta ,  Anupama Aniruddha Agashe ,  Nikila Krishnamoorthy ,  Rubin A. Parekhji

IPC分类号： G01R27/28 ,  G01R31/00 ,  G01R31/14 ,  G01R31/3167 ,  G01R31/317 ,  G01R31/3185 ,  G06F19/00 ,  G06J1/00

CPC分类号： G06J1/00 ,  G01R31/3167 ,  G01R31/31704 ,  G01R31/3172 ,  G01R31/318533

摘要： A mixed-signal core designed for efficient concurrent testing analog, mixed-signal, and digital components. One tester may test all components and, thereby, reduce test time without losing full test coverage. An analog module includes all the analog and mixed-signal components of the mixed-signal core, while a first digital module includes digital components required for functional/parametric verification of the mixed-signal components within the analog module. A first virtual boundary connects the analog and the first digital modules to gate the signal transfer during testing. A second digital module includes the remaining digital components of the mixed-signal core, whereby a second virtual boundary separates it from the first digital module. This type of partitioning enables the mixed-signal core to have three modes of operation, using which the analog, mixed-signal and digital components can all be tested.

摘要翻译： 混合信号核心设计用于高效并发测试模拟，混合信号和数字组件。 一个测试人员可以测试所有组件，从而减少测试时间，而不会损失完整的测试覆盖范围。 模拟模块包括混合信号核心的所有模拟和混合信号组件，而第一数字模块包括模拟量模块内混合信号组件的功能/参数验证所需的数字组件。 第一个虚拟边界将模拟和第一个数字模块连接起来，以在测试期间对信号传输进行门控。 第二数字模块包括混合信号核心的剩余数字分量，由此第二虚拟边界将其与第一数字模块分离。 这种分区使得混合信号核心具有三种操作模式，使用模式，混合信号和数字组件都可以进行测试。