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    Method and System For Workforce Optimization
    1.
    发明申请
    Method and System For Workforce Optimization 审中-公开
    劳动力优化方法与系统

    公开(公告)号：US20090204460A1

    公开(公告)日：2009-08-13

    申请号：US12030263

    申请日：2008-02-13

    申请人： Prashant Jain ,  Gyana Ranjan Parija ,  Anupam Saronwala ,  Anju Tandon

    发明人： Prashant Jain ,  Gyana Ranjan Parija ,  Anupam Saronwala ,  Anju Tandon

    IPC分类号： G06Q10/00

    CPC分类号： G06Q10/10 ,  G06Q10/0631 ,  G06Q10/06313

    摘要： A method, system and computer program product for workforce optimization in a service oriented industry, the method comprising planning and executing a business scheme which include providing as input business planning parameters relevant to the business scheme; developing a business plan to execute the business scheme based on the business planning parameters; identifying and allocating relevant resources for executing the business plan; intimating the identified resources with the plan to execute the business scheme.

    摘要翻译： 一种面向服务的行业劳动力优化的方法，系统和计算机程序产品，所述方法包括规划和执行业务方案，其包括提供与业务方案相关的输入业务规划参数; 制定业务计划，根据业务规划参数执行业务方案; 识别和分配执行业务计划的相关资源; 通过执行业务计划的计划，将确定的资源进行通知。

    METHOD AND SYSTEM FOR WORKFORCE OPTIMIZATION
    2.
    发明申请
    METHOD AND SYSTEM FOR WORKFORCE OPTIMIZATION 审中-公开
    用于人力优化的方法和系统

    公开(公告)号：US20090204461A1

    公开(公告)日：2009-08-13

    申请号：US12030283

    申请日：2008-02-13

    申请人： Prashant Jain ,  Gyana Ranjan Parija ,  Anupam Saronwala ,  Anju Tandon

    发明人： Prashant Jain ,  Gyana Ranjan Parija ,  Anupam Saronwala ,  Anju Tandon

    IPC分类号： G06Q10/00

    CPC分类号： G06Q10/06 ,  G06Q10/06311 ,  G06Q10/063118

    摘要： A system for workforce optimization in a service oriented industry, the system comprising a workforce optimization unit configured for planning and executing a business scheme which include providing as input business planning parameters relevant to the business scheme; developing a business plan to execute the business scheme based on the business planning parameters; identifying and allocating relevant resources for executing the business plan; intimating the identified resources with the plan to execute the business scheme.

    摘要翻译： 一种用于面向服务的行业中的劳动力优化的系统，所述系统包括被配置用于规划和执行业务方案的劳动力优化单元，所述业务方案包括提供与所述业务方案相关的输入业务规划参数; 制定业务计划，根据业务规划参数执行业务方案; 识别和分配执行业务计划的相关资源; 通过执行业务计划的计划，将确定的资源进行通知。

    Reducing implementation costs of communicating cache invalidation information in a multicore processor
    7.
    发明授权
    Reducing implementation costs of communicating cache invalidation information in a multicore processor 有权
    降低在多核处理器中传送缓存无效信息的实施成本

    公开(公告)号：US08639885B2

    公开(公告)日：2014-01-28

    申请号：US12643238

    申请日：2009-12-21

    申请人： Prashant Jain ,  Sandip Das ,  Sanjay Patel

    发明人： Prashant Jain ,  Sandip Das ,  Sanjay Patel

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0897 ,  Y02D10/13

    摘要： A processor may include several processor cores, each including a respective higher-level cache, wherein each higher-level cache includes higher-level cache lines; and a lower-level cache including lower-level cache lines, where each of the lower-level cache lines may be configured to store data that corresponds to multiple higher-level cache lines. In response to invalidating a given lower-level cache line, the lower-level cache may be configured to convey a sequence including several invalidation packets to the processor cores via an interface, where each member of the sequence of invalidation packets corresponds to a respective higher-level cache line to be invalidated, and where the interface is narrower than an interface capable of concurrently conveying all invalidation information corresponding to the given lower-level cache line. Each invalidation packet may include invalidation information indicative of a location of the respective higher-level cache line within different ones of the processor cores.

    摘要翻译： 处理器可以包括几个处理器核心，每个处理器核心包括相应的更高级别的高速缓存，其中每个更高级别的高速缓存包括更高级别的高速缓存行; 以及包括较低级别高速缓存行的下级缓存，其中每个下级高速缓存行可以被配置为存储对应于多个更高级别的高速缓存行的数据。 响应于使给定的低级高速缓存行无效，低级缓存可以被配置为经由接口将包括若干无效分组的序列传送到处理器核，其中无效分组序列中的每个成员对应于相应较高的 高级缓存行将被无效，并且其中接口比能够同时传送对应于给定下级高速缓存行的所有无效信息的接口更窄。 每个无效分组可以包括指示相应的较高级别高速缓存行在不同处理器核心内的位置的无效信息。

    PROCESSOR AND METHOD FOR WRITEBACK BUFFER REUSE
    9.
    发明申请
    PROCESSOR AND METHOD FOR WRITEBACK BUFFER REUSE 有权
    用于写缓冲区重用的处理器和方法

    公开(公告)号：US20110131379A1

    公开(公告)日：2011-06-02

    申请号：US12627354

    申请日：2009-11-30

    申请人： Prashant Jain ,  Srinivasan R. Iyengar ,  Jeffrey Thomas Oplinger

    发明人： Prashant Jain ,  Srinivasan R. Iyengar ,  Jeffrey Thomas Oplinger

    IPC分类号： G06F12/08 ,  G06F12/00

    CPC分类号： G06F12/0804 ,  G06F12/0811

    摘要： A processor may include a writeback configured to perform a first writeback operation to store corresponding writeback data back to a lower-level memory upon eviction of the writeback data, and a writeback buffer configured to store the writeback data after the writeback data has been evicted from the writeback cache and before the writeback data has been sent to the lower-level memory. After the writeback data has been sent from the writeback buffer to the lower-level memory, and before the lower-level memory has acknowledged completion of the first writeback operation, the writeback cache may perform a second writeback operation to store different writeback data in the writeback buffer in response to eviction of the different writeback data, such that a total size of the writeback data for the concurrently outstanding writeback operations exceeds a total size of writeback data that the writeback buffer is capable of concurrently storing.

    摘要翻译： 处理器可以包括写回，其被配置为执行第一回写操作以在驱逐回写数据时将相应的回写数据存储回低级存储器;以及写回缓冲器，其被配置为在写回数据已被逐出之后存储回写数据 回写高速缓存和写回数据已经发送到低级内存之前。 在回写数据已经从写回缓冲器发送到下级存储器之后，并且在低级存储器已经确认完成第一写回操作之前，回写高速缓存可以执行第二写回操作以将不同的写回数据存储在 回写缓冲器响应于不同的回写数据的消除，使得用于同时未完成的回写操作的回写数据的总大小超过回写缓冲器能够同时存储的回写数据的总大小。

    METHOD AND APPARATUS FOR SELECTIVELY APPLYING INTERFERENCE CANCELLATION IN SPREAD SPECTRUM SYSTEMS
    10.
    发明申请
    METHOD AND APPARATUS FOR SELECTIVELY APPLYING INTERFERENCE CANCELLATION IN SPREAD SPECTRUM SYSTEMS 有权
    选择性地在传播频谱系统中应用干扰消除的方法和装置

    公开(公告)号：US20100323624A1

    公开(公告)日：2010-12-23

    申请号：US12871748

    申请日：2010-08-30

    申请人： Anand P. Narayan ,  Eric S. Olson ,  Prashant Jain

    发明人： Anand P. Narayan ,  Eric S. Olson ,  Prashant Jain

    IPC分类号： H04B15/00

    CPC分类号： H04B1/7117 ,  H04B1/7107 ,  H04B1/71072 ,  H04B1/7115 ,  H04B2001/71077

    摘要： The present invention is directed to the selective provision of interference canceled signal streams to demodulating fingers in a communication receiver. According to the present invention, potential interferer signal paths are identified. Signal streams having one or more potential interferer signals removed or canceled are created, and a correlation is performed to determine whether the strength of a desired signal path increased as a result. If the correlation indicates that the strength of a desired signal path was increased by the signal cancellation, the interference canceled signal stream is provided to the demodulation finger assigned to track the desired signal path. If the correlation determines that the strength of the desired signal path did not increase as a result of performing interference cancellation, the raw or a different interference canceled signal stream is provided to the demodulation finger.

    摘要翻译： 本发明涉及在通信接收机中选择性地提供干扰消除信号流来解调手指。 根据本发明，识别潜在的干扰信号路径。 产生具有去除或取消的一个或多个潜在干扰信号的信号流，并且执行相关性以确定所需信号路径的强度是否随之增加。 如果相关性指示所需信号路径的强度通过信号消除而增加，则将干扰消除信号流提供给被分配用于跟踪期望信号路径的解调手指。 如果相关性确定期望信号路径的强度作为执行干扰消除的结果没有增加，则原始或不同的干扰消除信号流被提供给解调手指。