公开(公告)号：US09911889B2

公开(公告)日：2018-03-06

申请号：US15699436

申请日：2017-09-08

Applicant: QATAR UNIVERSITY ,  TEXAS A&M UNIVERSITY SYSTEM

Inventor： Aditya Chandra Sai Ratcha ,  Amit Verma ,  Reza Nekovei ,  Mahmoud M. Khader

IPC: H01L21/74 ,  H01L31/11 ,  H01L31/18 ,  H01L31/0352 ,  H01L31/0304

CPC classification number: H01L31/1105 ,  H01L31/03046 ,  H01L31/035263 ,  H01L31/03529 ,  H01L31/1844

Abstract: Certain embodiments of the present invention may be directed to a transistor structure. The transistor structure may include a semiconductor substrate. The semiconductor substrate may include a drift region, a collector region, an emitter region, and a lightly-doped/undoped region. The lightly-doped/undoped region may be lightly-doped and/or undoped. The transistor structure may also include a heterostructure. The heterostructure forms a heterojunction with the lightly-doped/undoped region. The transistor structure may also include a collector terminal. The collector terminal is in contact with the collector region. The transistor structure may also include a gate terminal. The gate terminal is in contact with the heterostructure. The transistor structure may also include an emitter terminal. The emitter terminal is in contact with the lightly-doped/undoped region and the emitter region.

公开(公告)号：US09793430B1

公开(公告)日：2017-10-17

申请号：US15149979

申请日：2016-05-09

Applicant: QATAR UNIVERSITY ,  TEXAS A&M UNIVERSITY SYSTEM

Inventor： Aditya Chandra Sai Ratcha ,  Amit Verma ,  Reza Nekovei ,  Mahmoud M. Khader

IPC: H01L29/66 ,  H01L31/11 ,  H01L31/0304 ,  H01L31/0352 ,  H01L31/18

CPC classification number: H01L31/1105 ,  H01L31/03046 ,  H01L31/035263 ,  H01L31/03529 ,  H01L31/1844

Abstract: Certain embodiments of the present invention may be directed to a transistor structure. The transistor structure may include a semiconductor substrate. The semiconductor substrate may include a drift region, a collector region, an emitter region, and a lightly-doped/undoped region. The lightly-doped/undoped region may be lightly-doped and/or undoped. The transistor structure may also include a heterostructure. The heterostructure forms a heterojunction with the lightly-doped/undoped region. The transistor structure may also include a collector terminal. The collector terminal is in contact with the collector region. The transistor structure may also include a gate terminal. The gate terminal is in contact with the heterostructure. The transistor structure may also include an emitter terminal. The emitter terminal is in contact with the lightly-doped/undoped region and the emitter region.