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公开(公告)号:US20170177497A1
公开(公告)日:2017-06-22
申请号:US14976537
申请日:2015-12-21
Applicant: QUALCOMM INCORPORATED
Inventor: DEXTER TAMIO CHUN , HYUNSUK SHIN
CPC classification number: G06F12/1009 , G06F12/0246 , G06F12/0802 , G06F12/1081 , G06F2212/1024 , G06F2212/401 , G06F2212/70 , G06F2212/7201
Abstract: Systems and methods are disclosed for providing logical-to-physical address translation for a managed NAND flash storage device. One embodiment is a system comprising a system on chip (SoC) electrically coupled to a volatile memory device. A direct memory access (DMA) controller is electrically coupled to the SoC. The DMA controller receives a logical address to be translated to a physical address associated with a managed NAND flash storage device. A cache controller is configured to fetch from the volatile memory device a portion of a logical-to-physical (L2P) address table comprising a compressed version of a L2P mapping for the logical address. A compression block is configured to decompress the compressed version of the L2P mapping to determine the physical address corresponding to the logical address.
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公开(公告)号:US20190272110A1
公开(公告)日:2019-09-05
申请号:US16287393
申请日:2019-02-27
Applicant: QUALCOMM Incorporated
Inventor: HYUNSUK SHIN , Hung VUONG
Abstract: Methods and apparatuses to fragment data in a flash memory device are presented. The apparatus includes a host configured to request a flash memory device, via a memory bus, to fragment data stored in the flash memory device in response to a determination of a data fragmentation status of the flash memory device exceeding a threshold. The method includes determining a data fragmentation status of the flash memory device exceeding a threshold and requesting, by a host, the flash memory device to fragment data stored in the flash memory device in response to the determining the data fragmentation status exceeding the threshold.
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