公开(公告)号：US09363110B2

公开(公告)日：2016-06-07

申请号：US14646360

申请日：2013-01-08

申请人： QUALCOMM INCORPORATED

发明人： Haitao Zhang ,  Yin Huang ,  Jian Li ,  Yisheng Xue

IPC分类号： H03H7/30 ,  H04L25/02 ,  H04L25/03 ,  H04B10/60 ,  H04L1/00

CPC分类号： H04L25/0212 ,  H04B10/60 ,  H04L1/0054 ,  H04L25/03057

摘要： A receiver is disclosed that includes a slicer having an input to receive a sequence of symbols exhibiting inter-symbol-interference (ISI). The slicer determines a state associated with each symbol based on a threshold. A feedback equalization unit is coupled to the slicer to apply equalization to the symbol fed to the slicer input based on prior detected symbol states. A Least-Mean-Square (LMS) unit cooperates with the slicer and feedback equalization unit to estimate a channel impulse response based on the equalized symbols. The LMS unit feeds the estimated channel impulse response to a Maximum-Likelihood-Sequence-Estimation (MLSE) unit to generate an estimated sequence of bits based on the estimated channel impulse response.

摘要翻译： 公开了一种接收器，其包括具有用于接收呈现符号间干扰（ISI）的符号序列的输入的限幅器。 限幅器基于阈值确定与每个符号相关联的状态。 反馈均衡单元耦合到限幅器，以基于先前检测的符号状态对馈送到限幅器输入的符号施加均衡。 最小均方（LMS）单元与限幅器和反馈均衡单元协作以基于均衡符号来估计信道脉冲响应。 LMS单元将估计的信道脉冲响应馈送到最大似然序列估计（MLSE）单元，以基于所估计的信道脉冲响应来产生估计的比特序列。