公开(公告)号：US09116876B2

公开(公告)日：2015-08-25

申请号：US13718014

申请日：2012-12-18

Applicant: QUALCOMM Incorporated

Inventor： Woo Tag Kang ,  Roberto F. Averbuj ,  Manish Shah

IPC: G06F11/00 ,  G06F11/27 ,  G11C29/12 ,  G11C29/04

CPC classification number: G06F11/27 ,  G11C29/1201 ,  G11C2029/0401

Abstract: Some novel features pertain to a memory controller that includes a memory controller logic, a built-in-self-tester (BIST) logic, and a switch. The memory controller logic is for controlling memory on a memory die. The built-in-self tester (BIST) logic is for testing the memory. The switch is coupled to the BIST logic and the memory. In some implementations, the BIST logic bypasses the memory controller logic when testing the memory by accessing the memory through the switch. The switch may be controlled by the BIST logic. In some implementations, the switch is coupled to the memory controller logic. The switch may control data to the memory that is transmitted from the memory controller logic and the BIST logic based on priority of the data.

Abstract translation: 一些新颖的功能涉及包括存储器控制器逻辑，内置自测试器（BIST）逻辑和开关的存储器控​​制器。 存储器控制器逻辑用于控制存储器管芯上的存储器。 内置自测试器（BIST）逻辑用于测试存储器。 开关耦合到BIST逻辑和存储器。 在一些实现中，当通过通过交换机访问存储器来测试存储器时，BIST逻辑绕过存储器控制器逻辑。 开关可以由BIST逻辑控制。 在一些实现中，开关耦合到存储器控制器逻辑。 交换机可以基于数据的优先级将数据控制到从存储器控制器逻辑和BIST逻辑发送的存储器。

公开(公告)号：US20140173344A1

公开(公告)日：2014-06-19

申请号：US13718014

申请日：2012-12-18

Applicant: QUALCOMM INCORPORATED

Inventor： Wootag Kang ,  Roberto F. Averbuj ,  Manish Shah

IPC: G06F11/27

CPC classification number: G06F11/27 ,  G11C29/1201 ,  G11C2029/0401

Abstract: Some novel features pertain to a memory controller that includes a memory controller logic, a built-in-self-tester (BIST) logic, and a switch. The memory controller logic is for controlling memory on a memory die. The built-in-self tester (BIST) logic is for testing the memory. The switch is coupled to the BIST logic and the memory. In some implementations, the BIST logic bypasses the memory controller logic when testing the memory by accessing the memory through the switch. The switch may be controlled by the BIST logic. In some implementations, the switch is coupled to the memory controller logic. The switch may control data to the memory that is transmitted from the memory controller logic and the BIST logic based on priority of the data.

Abstract translation: 一些新颖的功能涉及包括存储器控制器逻辑，内置自测试器（BIST）逻辑和开关的存储器控​​制器。 存储器控制器逻辑用于控制存储器管芯上的存储器。 内置自测试器（BIST）逻辑用于测试存储器。 开关耦合到BIST逻辑和存储器。 在一些实现中，当通过通过交换机访问存储器来测试存储器时，BIST逻辑绕过存储器控制器逻辑。 开关可以由BIST逻辑控制。 在一些实现中，开关耦合到存储器控制器逻辑。 交换机可以基于数据的优先级将数据控制到从存储器控制器逻辑和BIST逻辑发送的存储器。