公开(公告)号：US10811086B1

公开(公告)日：2020-10-20

申请号：US16523350

申请日：2019-07-26

Applicant: QUALCOMM Incorporated

Inventor： Shiba Narayan Mohanty ,  Sharad Kumar Gupta ,  Rahul Sahu ,  Pradeep Raj ,  Veerabhadra Rao Boda ,  Adithya Bhaskaran ,  Akshdeepika

IPC: G11C11/00 ,  G11C11/418 ,  G11C11/412 ,  G11C11/419

Abstract: A memory is provided that includes a negative bit line boost circuit for boosting a discharged bit line to a negative voltage during a negative bit line boost period for a write operation to a selected column in the memory. The memory also includes a core voltage control circuit configured to float a core power supply voltage for the selected column during the negative bit line boost period.