公开(公告)号：US20150074357A1

公开(公告)日：2015-03-12

申请号：US14195792

申请日：2014-03-03

Applicant: QUALCOMM Incorporated

Inventor： Joseph G. MCDONALD ,  Jaya Prakash Subramaniam GANASAN ,  Thomas Philip SPEIER ,  Eric F. ROBINSON ,  Jason Lawrence PANAVICH ,  Thuong Q. TRUONG

IPC: G06F12/08

CPC classification number: G06F12/0831 ,  G06F12/0824 ,  G06F12/0833 ,  G06F2212/1024 ,  G06F2212/1041

Abstract: A low latency cache intervention mechanism implements a snoop filter to dynamically select an intervener cache for a cache “hit” in a multiprocessor architecture of a computer system. The selection of the intervener is based on variables such as latency, topology, frequency, utilization, load, wear balance, and/or power state of the computer system.

Abstract translation: 低延迟高速缓存干预机制实现了窥探过滤器来动态地选择用于计算机系统的多处理器架构中的高速缓存“命中”的intervener缓存。 干扰器的选择基于诸如延迟，拓扑，频率，利用率，负载，磨损平衡和/或计算机系统的功率状态等变量。