公开(公告)号：US20170085331A1

公开(公告)日：2017-03-23

申请号：US14858437

申请日：2015-09-18

Applicant: QUALCOMM Incorporated

Inventor： Phillip Michael Clovis ,  Michael Drop ,  Isaac Berk

IPC: H04J3/06 ,  H04L7/033

CPC classification number: H04J3/0658 ,  G06F13/1689 ,  G06F13/4291 ,  H04L7/0331

Abstract: A memory controller is provided to increment a source timestamp count responsive to a clock signal. Further, the memory controller associates the source timestamp count to a respective word for each endpoint in a plurality of endpoints. The memory controller transmits the received clock signal, a respective data word, and an associated source count to each endpoint. Each endpoint increments a destination count responsive to the clock signal. Each endpoint further transmits its respective word to an external memory responsive to the destination count being greater than or equal to the associated source count by a threshold margin.