公开(公告)号：US12174757B1

公开(公告)日：2024-12-24

申请号：US18338653

申请日：2023-06-21

Applicant: QUALCOMM INCORPORATED

Inventor： Santhosh Reddy Akavaram ,  Prakhar Srivastava ,  Sridhar Anumala ,  Ramacharan Sundararaman ,  Sonali Jabreva ,  Khushboo Kumari ,  Sanjay Verdu

IPC: G06F13/16

Abstract: Methods and apparatuses are provided to reduce latencies associated with state transitions in die-to-die interconnect architectures. In one example, a physical layer of a die detects a first event indicating a transition to a lower power state. In response to the first event, the physical layer transitions to a lower power state where one or more clock configuration values are read from registers and stored in memory. The physical layer then detects a second event indicating a transition to an active state. In response to the second event, the physical layer reads the clock configuration values from the memory, and writes the clock configuration values to the registers. The physical layer then transitions to a power stabilization state, and remains in the power stabilization state for an amount of time to allow clocks to stabilize. The physical layer then transitions to a training state.

公开(公告)号：US20250086136A1

公开(公告)日：2025-03-13

申请号：US18466299

申请日：2023-09-13

Applicant: QUALCOMM Incorporated

Inventor： Ravindranath DODDI ,  Umamaheshwaran V ,  Afreen HAIDER ,  Lekhya Pavani GODAVARTHI ,  Harinatha Reddy RAMIREDDY ,  James Lionel Panian ,  Ramacharan Sundararaman ,  Santhosh Reddy Akavaram

IPC: G06F13/42 ,  G06F15/78

Abstract: Various embodiments include methods and devices for implementing Universal Chiplet Interconnect Express (UCIe) link configuration for multi-module chiplets of a computing device. Embodiments may include transitioning a UCIe link in an active state having a first sideband that is active to the UCIe link in a reset state, and initializing at least one sideband for the UCIe link that is a different functional sideband of a multi-module chiplet than the first sideband following the reset state of the UCIe link. Embodiments may include reading sideband data configured to represent a functional sideband of the multi-module chiplet, and initializing the functional sideband as the at least one sideband. Embodiments may include reading sideband data configured to represent at least two functional sidebands of the multi-module chiplet, and initializing at least one functional sideband of the at least two functional sidebands as the at least one sideband.