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公开(公告)号:US20240411481A1
公开(公告)日:2024-12-12
申请号:US18530074
申请日:2023-12-05
Applicant: QUALCOMM Incorporated
Inventor: Chintalapati BHARATH SAI VARMA , Santhosh Reddy AKAVARAM , Sai Naresh GAJAPAKA , Hung VUONG , Radhakrishna MUGADA , Prakhar SRIVASTAVA , Vamsi Krishna SAMBANGI
IPC: G06F3/06
Abstract: Methods that may be performed by a universal flash storage (UFS) system of a computing device for optimizing usage of a shared write booster buffer to extend lifetime. The method may include writing data to a flash storage device including a plurality of logical units of memory by receiving a command identifying a logical unit among the plurality of logical units to store data and data for storage in the identified logical unit, obtaining information indicating a memory write type for the identified logical unit, and writing the received data to either a shared write booster buffer before writing to the identified logical unit of device storage or directly to the identified logical unit of device storage based on the obtained memory write type
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公开(公告)号:US20250094584A1
公开(公告)日:2025-03-20
申请号:US18468466
申请日:2023-09-15
Applicant: QUALCOMM INCORPORATED
Inventor: Vamsi Krishna SAMBANGI , Sai Naresh GAJAPAKA , Santhosh Reddy AKAVARAM , Venkatesha M IYENGAR
Abstract: Systems and methods for improving security of a Universal Flash Storage (UFS) device during a purge operation. If a purge operation being performed in the UFS device is interrupted prematurely, due to issuance of one or more urgent commands, the UFS device notifies the host processor that the purge operation has been interrupted. After the host processor performs the urgent command(s), it causes the UFS device to resume performance of the purge operation and the host processor delays performance of any other commands that arrive at the command queue (CQ) of the host processor until the resumed purge operation has been completed. Because the purge operation is resumed and completed before the host processor performs any of the other command(s) that have arrived at the CQ, die-level attacks seeking to access unpurged data by sending read commands to the CQ of the host processor are thwarted.
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公开(公告)号:US20250044982A1
公开(公告)日:2025-02-06
申请号:US18364277
申请日:2023-08-02
Applicant: QUALCOMM Incorporated
Inventor: Sai Naresh GAJAPAKA , Chintalapati BHARATH SAI VARMA , Santhosh Reddy AKAVARAM , Prakhar SRIVASTAVA , Vamsi Krishna SAMBANGI
IPC: G06F3/06
Abstract: Aspects relate to interrupting memory access during background operations of a memory device. In one example a memory device includes a memory controller to initiate a write buffer flush operation. A bus interface is coupled to a main memory and to a write buffer to receive a write command from a host during the write buffer flush operation. The memory controller initiates the write buffer flush operation, suspends the write buffer flush operation in response to the write command, sends a last flushed address of the write buffer from the memory device to the host through the bus interface, and unmaps a portion of the write buffer using the last flushed address.
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