公开(公告)号：US11742253B2

公开(公告)日：2023-08-29

申请号：US17110837

申请日：2020-12-03

Applicant: QUALCOMM Incorporated

Inventor： Sayok Chattopadhyay ,  Rajneesh Kumar ,  Srikanth Kulkarni

IPC: H01L23/31 ,  H01L23/495 ,  H01L21/78 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L23/3121 ,  H01L21/4853 ,  H01L21/565 ,  H01L21/78 ,  H01L23/49541

Abstract: An integrated circuit (IC) package that is to be incorporated into a computing device may include a metallization structure with circuits and/or other elements such as capacitors or inductors thereon. Pads for input/output (I/O) (or other) purposes may also be present at different locations on the metallization structure. Exemplary aspects of the present disclosure allow mold material to be placed over the circuits and/or other elements in readily-customizable configurations so as to allow placement of the I/O pads in any desired location on the metallization structure. Specifically, before the mold material is applied to the metallization structure, a mask material such as tape may be applied to portions of the metallization structure that contain I/O pads or otherwise have reasons to not have mold material thereon. The mold material is applied, and the mask material is removed, taking unwanted mold material with the mask material.

公开(公告)号：US11211263B2

公开(公告)日：2021-12-28

申请号：US16687778

申请日：2019-11-19

Applicant: QUALCOMM Incorporated

Inventor： Srikanth Kulkarni ,  Rajneesh Kumar ,  Sayok Chattopadhyay

IPC: H01L21/56 ,  H01L23/31 ,  H01L25/16 ,  H01L21/768 ,  H01L21/66 ,  H01L21/78

Abstract: Certain aspects of the present disclosure provide apparatus and techniques for partially molding packages for integrated circuits. A packaged assembly for integrated circuits includes: a substrate having at least one mold barrier between a first region on a first surface of the substrate and a second region on the first surface; a die attached to the substrate; one or more components attached to the substrate in the first region; and a first encapsulant over the one or more components in the first region, wherein the at least one mold barrier is configured to block a portion of the first encapsulant from moving from the first region of the substrate to the second region of the substrate during an application of the first encapsulant.

公开(公告)号：US20210351096A1

公开(公告)日：2021-11-11

申请号：US17110837

申请日：2020-12-03

Applicant: QUALCOMM Incorporated

Inventor： Sayok Chattopadhyay ,  Rajneesh Kumar ,  Srikanth Kulkarni

IPC: H01L23/31 ,  H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: An integrated circuit (IC) package that is to be incorporated into a computing device may include a metallization structure with circuits and/or other elements such as capacitors or inductors thereon. Pads for input/output (I/O) (or other) purposes may also be present at different locations on the metallization structure. Exemplary aspects of the present disclosure allow mold material to be placed over the circuits and/or other elements in readily-customizable configurations so as to allow placement of the I/O pads in any desired location on the metallization structure. Specifically, before the mold material is applied to the metallization structure, a mask material such as tape may be applied to portions of the metallization structure that contain I/O pads or otherwise have reasons to not have mold material thereon. The mold material is applied, and the mask material is removed, taking unwanted mold material with the mask material.