公开(公告)号：US12093096B2

公开(公告)日：2024-09-17

申请号：US18082518

申请日：2022-12-15

Applicant: QUALCOMM Incorporated

Inventor： Aravind Bhaskara ,  Zhurang Zhao ,  Kiran Bhagwat ,  Michael Tipton ,  Joshua Stubbs ,  Jyotirmoy Das ,  Thomas Tang

IPC: G06F1/00 ,  G06F1/08 ,  G06F1/26 ,  G06F1/3203

CPC classification number: G06F1/26 ,  G06F1/08 ,  G06F1/3203

Abstract: Various dynamic voltage and frequency scaling (DVFS) techniques can optimize the high voltage residency of a device containing multiple processing cores that share a voltage rail. The DVFS techniques described herein can reduce the high voltage residency (duration) of the voltage rail by aligning the high frequency duration of multiple cores sharing the same voltage rail.