公开(公告)号：US11221774B2

公开(公告)日：2022-01-11

申请号：US17011720

申请日：2020-09-03

Applicant: QUALCOMM Incorporated

Inventor： Hyunsuk Shin ,  Todd Christopher Reynolds ,  Hung Vuong

IPC: G06F3/06 ,  G11C5/14 ,  G06F1/3234 ,  G11C16/30 ,  G06F13/16

Abstract: Systems and method are directed to Universal Flash Storage (UFS) memory system configured to support deep power-down modes wherein the UFS memory system is not required to be responsive to commands received from a host device coupled to the UFS memory system. Correspondingly, in the deep power-down modes, a link or interface between the UFS memory system and the host device may also be powered down. The UFS memory system may enter the deep power-down modes based on a command received from the host device or a hardware reset assertion, and exit the deep power-down modes based on a hardware reset de-assertion or power cycling. While in deep power-down modes, the power consumption of the UFS memory device is substantially lower than the power consumption of the UFS memory device in conventional power modes.

公开(公告)号：US11249134B1

公开(公告)日：2022-02-15

申请号：US17064220

申请日：2020-10-06

Applicant: QUALCOMM INCORPORATED

Inventor： Varun Jain ,  Todd Christopher Reynolds ,  Xinyi Chang ,  Anuj Gangan

IPC: G01R31/3177 ,  G06F11/26 ,  G01R31/3185 ,  G01R31/28

Abstract: Physical or off-chip interfaces may be selectively bypassed in a boundary scan chain. A bypass control signal may be produced that indicates whether to bypass a selected one of the interfaces. In response to a first state of a bypass control signal, a multiplexer may couple the scan chain output of an interface boundary scan cell to the scan chain input of a successor boundary scan cell of the interface boundary scan cell. In response to a second state of the bypass control signal, the multiplexer may couple the scan chain output of a predecessor boundary scan cell of the interface boundary scan cell to the scan chain input of the successor boundary scan cell, bypassing the interface boundary scan cell.

公开(公告)号：US10802736B2

公开(公告)日：2020-10-13

申请号：US16030841

申请日：2018-07-09

Applicant: QUALCOMM Incorporated

Inventor： Hyunsuk Shin ,  Todd Christopher Reynolds ,  Hung Vuong

IPC: G06F3/06 ,  G11C5/14 ,  G06F1/3234 ,  G11C16/30 ,  G06F13/16

Abstract: Systems and method are directed to Universal Flash Storage (UFS) memory system configured to support deep power-down modes wherein the UFS memory system is not required to be responsive to commands received from a host device coupled to the UFS memory system. Correspondingly, in the deep power-down modes, a link or interface between the UFS memory system and the host device may also be powered down. The UFS memory system may enter the deep power-down modes based on a command received from the host device or a hardware reset assertion, and exit the deep power-down modes based on a hardware reset de-assertion or power cycling. While in deep power-down modes, the power consumption of the UFS memory device is substantially lower than the power consumption of the UFS memory device in conventional power modes.