公开(公告)号：US09396130B2

公开(公告)日：2016-07-19

申请号：US13969451

申请日：2013-08-16

Applicant: QUALCOMM TECHNOLOGIES, INC.

Inventor： Philippe Boucard ,  Jean-Jacques LeCler ,  Laurent Moll

IPC: G06F12/08 ,  G06F12/10 ,  G06F17/50 ,  G06F12/02

CPC classification number: G06F12/1036 ,  G06F12/0207 ,  G06F12/0215 ,  G06F12/0811 ,  G06F12/1027 ,  G06F12/1081 ,  G06F17/5009 ,  G06F2212/681

Abstract: System TLBs are integrated within an interconnect, use a and share a transport network to connect to a shared walker port. Transactions are able to pass STLB allocation information through a second initiator side interconnect, in a way that interconnects can be cascaded, so as to allow initiators to control a shared STLB within the first interconnect. Within the first interconnect, multiple STLBs share an intermediate-level translation cache that improves performance when there is locality between requests to the two STLBs.

Abstract translation: 系统TLB集成在互连中，使用并共享传输网络连接到共享步进端口。 事务能够通过第二发起方侧互连传递STLB分配信息，其中互连可以级联，以便允许发起者控制第一互连中的共享STLB。 在第一个互连中，多个STLB共享中间级转换缓存，当在两个STLB的请求之间存在局部性时，可提高性能。

公开(公告)号：US09141556B2

公开(公告)日：2015-09-22

申请号：US13969425

申请日：2013-08-16

Applicant: QUALCOMM TECHNOLOGIES, INC.

Inventor： Laurent Moll ,  Jean-Jacques LeCler ,  Philippe Boucard

IPC: G06F12/00 ,  G06F12/10 ,  G06F12/08 ,  G06F17/50 ,  G06F12/02

CPC classification number: G06F12/1036 ,  G06F12/0207 ,  G06F12/0215 ,  G06F12/0811 ,  G06F12/1027 ,  G06F12/1081 ,  G06F17/5009 ,  G06F2212/681

Abstract: A system TLB accepts translation prefetch requests from initiators. Misses generate external translation requests to a walker port. Attributes of the request such as ID, address, and class, as well as the state of the TLB affect the allocation policy of translations within multiple levels of translation tables. Translation tables are implemented with SRAM, and organized in groups.

Abstract translation: 系统TLB接受来自发起者的翻译预取请求。 Misses会向Walker端口生成外部翻译请求。 诸如ID，地址和类的请求的属性以及TLB的状态会影响多级翻译表中的翻译分配策略。 翻译表用SRAM实现，并组织成组。