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公开(公告)号:US11726197B2
公开(公告)日:2023-08-15
申请号:US16653201
申请日:2019-10-15
Applicant: QUALCOMM TECHNOLOGIES, INC.
Inventor: Muthu M. Baskaran , Thomas Henretty , Ann Johnson , Athanasios Konstantinidis , M. H. Langston , Janice O. McMahon , Benoit J. Meister , Paul D. Mountcastle , Aale Naqvi , Benoit Pradelle , Tahina Ramananandro , Sanket Tavarageri , Richard A. Lethin
CPC classification number: G01S13/723 , G01S7/411 , G01S7/4802 , B64C39/024 , B64U2101/20 , G01S3/7864 , G01S7/4808 , G01S17/66
Abstract: A system for determining the physical path of an object can map several candidate paths to a suitable path space that can be explored using a convex optimization technique. The optimization technique may take advantage of the typical sparsity of the path space and can identify a likely physical path using a function of sensor observation as constraints. A track of an object can also be determined using a track model and a convex optimization technique.
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公开(公告)号:US11789769B2
公开(公告)日:2023-10-17
申请号:US16791361
申请日:2020-02-14
Applicant: QUALCOMM TECHNOLOGIES, INC.
Inventor: Muthu M. Baskaran , Thomas Henretty , M. H. Langston , Richard A. Lethin , Benoit J. Meister , Nicolas T. Vasilache , David E. Wohlford
CPC classification number: G06F9/4843
Abstract: In a system for automatic generation of event-driven, tuple-space based programs from a sequential specification, a hierarchical mapping solution can target different runtimes relying on event-driven tasks (EDTs). The solution uses loop types to encode short, transitive relations among EDTs that can be evaluated efficiently at runtime. Specifically, permutable loops translate immediately into conservative point-to-point synchronizations of distance one. A runtime-agnostic which can be used to target the transformed code to different runtimes.
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公开(公告)号:US11500557B2
公开(公告)日:2022-11-15
申请号:US16745890
申请日:2020-01-17
Applicant: QUALCOMM TECHNOLOGIES, INC.
Inventor: Muthu M. Baskaran , Thomas Henretty , Ann Johnson , Athanasios Konstantinidis , M. H. Langston , Janice O. McMahon , Benoit J. Meister , Paul D. Mountcastle , Aale Naqvi , Benoit Pradelle , Tahina Ramananandro , Sanket Tavarageri , Richard A. Lethin
Abstract: A compilation system using an energy model based on a set of generic and practical hardware and software parameters is presented. The model can represent the major trends in energy consumption spanning potential hardware configurations using only parameters available at compilation time. Experimental verification indicates that the model is nimble yet sufficiently precise, allowing efficient selection of one or more parameters of a target computing system so as to minimize power/energy consumption of a program while achieving other performance related goals. A voltage and/or frequency optimization and selection is presented which can determine an efficient dynamic hardware configuration schedule at compilation time. In various embodiments, the configuration schedule is chosen based on its predicted effect on energy consumption. A concurrency throttling technique based on the energy model can exploit the power-gating features exposed by the target computing system to increase the energy efficiency of programs.
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