公开(公告)号：US08151236B2

公开(公告)日：2012-04-03

申请号：US12017025

申请日：2008-01-19

申请人： Qing Su ,  Yongqiang Lu ,  Charles C. Chiang

发明人： Qing Su ,  Yongqiang Lu ,  Charles C. Chiang

IPC分类号： G06F19/50

CPC分类号： G03F1/68

摘要： Roughly described, a method for mask data preparation is described, for use with a preliminary mask layout that includes a starting polygon, the vertices of the starting polygon including I-points (vertices of the starting polygon having an interior angle greater than 90 degrees), including steps of developing a rectilinear partition tree on at least the I-points of the starting polygon, and using the edges of the partition tree to define the partition of the starting polygon into sub-polygons for mask writing.

摘要翻译： 粗略地描述了一种用于掩模数据准备的方法，用于包括起始多边形的初步掩模布局，起始多边形的顶点包括I点（具有大于90度的内角的起始多边形的顶点） 包括在至少起始多边形的I点上开发直线分区树的步骤，以及使用分区树的边将起始多边形的分区定义为用于掩码写入的子多边形。

公开(公告)号：US20090187876A1

公开(公告)日：2009-07-23

申请号：US12017025

申请日：2008-01-19

申请人： Qing Su ,  Yongqiang Lu ,  Charles C. Chiang

发明人： Qing Su ,  Yongqiang Lu ,  Charles C. Chiang

IPC分类号： G06F17/50

CPC分类号： G03F1/68

摘要： Roughly described, a method for mask data preparation is described, for use with a preliminary mask layout that includes a starting polygon, the vertices of the starting polygon including I-points (vertices of the starting polygon having an interior angle greater than 90 degrees), including steps of developing a rectilinear partition tree on at least the I-points of the starting polygon, and using the edges of the partition tree to define the partition of the starting polygon into sub-polygons for mask writing.

摘要翻译： 粗略地描述了一种用于掩模数据准备的方法，用于包括起始多边形的初步掩模布局，起始多边形的顶点包括I点（具有大于90度的内角的起始多边形的顶点） 包括在至少起始多边形的I点上开发直线分区树的步骤，以及使用分区树的边将起始多边形的分区定义为用于掩码写入的子多边形。

公开(公告)号：US20080148196A1

公开(公告)日：2008-06-19

申请号：US12032313

申请日：2008-02-15

申请人： Qing Su ,  Subarnarekha Sinha ,  Charles C. Chiang

发明人： Qing Su ,  Subarnarekha Sinha ,  Charles C. Chiang

IPC分类号： G06F17/50

CPC分类号： G06F17/5068

摘要： Method and apparatus for approximating the average critical area of a layout or layout region, involving summing, over all the object segments of interest, respective critical area contribution values that are dependent upon particular layout parameters of the objects, each of the contribution values being representative of a plurality of defect sizes, and being defined such that for each defect size in the plurality of defect sizes, and for a particular defect type, the contribution values collectively count all critical areas arising due to the object segments of interest only once.

摘要翻译： 用于近似布局或布局区域的平均临界区域的方法和装置，涉及在感兴趣的所有对象段上求和相应于依赖于对象的特定布局参数的关键区域贡献值，每个贡献值是代表性的 并且被定义为使得对于多个缺陷尺寸中的每个缺陷尺寸，并且对于特定缺陷类型，贡献值集合地计数由于感兴趣的对象片段而产生的所有关键区域一次。

公开(公告)号：US07346865B2

公开(公告)日：2008-03-18

申请号：US10978946

申请日：2004-11-01

申请人： Qing Su ,  Subarnarekha Sinha ,  Charles C. Chiang

发明人： Qing Su ,  Subarnarekha Sinha ,  Charles C. Chiang

IPC分类号： G06F17/50

CPC分类号： G06F17/5068

摘要： Method and apparatus for approximating the average critical area of a layout or layout region, involving summing, over all the object segments of interest, respective critical area contribution values that are dependent upon particular layout parameters of the objects, each of the contribution values being representative of a plurality of defect sizes, and being defined such that for each defect size in the plurality of defect sizes, and for a particular defect type, the contribution values collectively count all critical areas arising due to the object segments of interest only once.

摘要翻译： 用于近似布局或布局区域的平均临界区域的方法和装置，涉及在感兴趣的所有对象段上求和相应于依赖于对象的特定布局参数的关键区域贡献值，每个贡献值是代表性的 并且被定义为使得对于多个缺陷尺寸中的每个缺陷尺寸，并且对于特定缺陷类型，贡献值集合地计数由于感兴趣的对象片段而产生的所有关键区域一次。

公开(公告)号：US08205179B2

公开(公告)日：2012-06-19

申请号：US12542621

申请日：2009-08-17

申请人： Qing Su ,  Subarnarekha Sinha ,  Charles C. Chiang

发明人： Qing Su ,  Subarnarekha Sinha ,  Charles C. Chiang

IPC分类号： G06F17/50

CPC分类号： G06F17/5068

摘要： Method and apparatus for approximating the average critical area of a layout or layout region, involving summing, over all the object segments of interest, respective critical area contribution values that are dependent upon particular layout parameters of the objects, each of the contribution values being representative of a plurality of defect sizes, and being defined such that for each defect size in the plurality of defect sizes, and for a particular defect type, the contribution values collectively count all critical areas arising due to the object segments of interest only once.

公开(公告)号：US07962873B2

公开(公告)日：2011-06-14

申请号：US12032299

申请日：2008-02-15

申请人： Qing Su ,  Subarnarekha Sinha ,  Charles C. Chiang

发明人： Qing Su ,  Subarnarekha Sinha ,  Charles C. Chiang

IPC分类号： G06F17/50

CPC分类号： G06F17/5068

摘要： Method and apparatus for approximating the average critical area of a layout or layout region, involving summing, over all the object segments of interest, respective critical area contribution values that are dependent upon particular layout parameters of the objects, each of the contribution values being representative of a plurality of defect sizes, and being defined such that for each defect size in the plurality of defect sizes, and for a particular defect type, the contribution values collectively count all critical areas arising due to the object segments of interest only once.

摘要翻译： 用于近似布局或布局区域的平均临界区域的方法和装置，涉及在感兴趣的所有对象段上求和相应于依赖于对象的特定布局参数的关键区域贡献值，每个贡献值是代表性的 并且被定义为使得对于多个缺陷尺寸中的每个缺陷尺寸，并且对于特定缺陷类型，贡献值集合地计数由于感兴趣的对象片段而产生的所有关键区域一次。

公开(公告)号：US20090307644A1

公开(公告)日：2009-12-10

申请号：US12542621

申请日：2009-08-17

申请人： Qing Su ,  Subarnarekha Sinha ,  Charles C. Chiang

发明人： Qing Su ,  Subarnarekha Sinha ,  Charles C. Chiang

IPC分类号： G06F17/50

CPC分类号： G06F17/5068

摘要： Method and apparatus for approximating the average critical area of a layout or layout region, involving summing, over all the object segments of interest, respective critical area contribution values that are dependent upon particular layout parameters of the objects, each of the contribution values being representative of a plurality of defect sizes, and being defined such that for each defect size in the plurality of defect sizes, and for a particular defect type, the contribution values collectively count all critical areas arising due to the object segments of interest only once.

公开(公告)号：US20080295046A1

公开(公告)日：2008-11-27

申请号：US11805916

申请日：2007-05-25

申请人： Qing Su ,  Charles C. Chiang

发明人： Qing Su ,  Charles C. Chiang

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/10

摘要： One embodiment of the present invention provides a system that predicts a manufacturing yield of a chip. During operation, the system first receives a chip layout. Next, the system identifies hotspots within the chip layout, wherein a hotspot is a location within the chip layout wherein a yield-indicative variable value falls in a low manufacturable range. The system then obtains yield scores for the hotspots, wherein a yield score indicates a failure probability for a corresponding hotspot. Next, the system predicts the manufacturing yield for the chip based on the hotspots and the yield scores for the hotspots.

摘要翻译： 本发明的一个实施例提供一种预测芯片的制造成品率的系统。 在操作过程中，系统首先接收芯片布局。 接下来，系统识别芯片布局内的热点，其中热点是芯片布局内的位置，其中屈服指示变量值落在低可制造范围内。 然后，系统获得热点的产出分数，其中收益率分数指示相应热点的失败概率。 接下来，该系统基于热点估计芯片的制造成品率以及热点的成品率。

公开(公告)号：US08000826B2

公开(公告)日：2011-08-16

申请号：US11339184

申请日：2006-01-24

申请人： Jianfeng Luo ,  Subarnarekha Sinha ,  Qing Su ,  Charles C. Chiang

发明人： Jianfeng Luo ,  Subarnarekha Sinha ,  Qing Su ,  Charles C. Chiang

IPC分类号： G06F11/00 ,  G06F19/00 ,  G05B11/01 ,  H01L23/58 ,  G06K9/00

CPC分类号： G05B19/41875 ,  G05B2219/32204 ,  G05B2219/35142 ,  G05B2219/45031 ,  Y02P90/22

摘要： One embodiment of the present invention provides a system that predicts manufacturing yield for a die within a semiconductor wafer. During operation, the system first receives a physical layout of the die. Next, the system partitions the die into an array of tiles. The system then computes systematic variations for a quality indicative value to describe a process parameter across the array of tiles based on the physical layout of the die. Next, the system applies a random variation for the quality indicative parameter to each tile in the array of tiles. Finally, the system obtains the manufacturing yield for the die based on both the systematic variations and the random variations.

摘要翻译： 本发明的一个实施例提供了一种系统，其预测半导体晶片内的管芯的制造成品率。 在操作期间，系统首先接收模具的物理布局。 接下来，系统将模具分割成瓦片阵列。 然后，该系统计算质量指示值的系统变化，以基于模具的物理布局描述整个瓦片阵列上的过程参数。 接下来，系统将质量指示参数的随机变量应用于瓦片阵列中的每个瓦片。 最后，系统基于系统变化和随机变量得到了模具的制造成品率。

公开(公告)号：US07707526B2

公开(公告)日：2010-04-27

申请号：US11805916

申请日：2007-05-25

申请人： Qing Su ,  Charles C. Chiang

发明人： Qing Su ,  Charles C. Chiang

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/10

摘要： One embodiment of the present invention provides a system that predicts a manufacturing yield of a chip. During operation, the system first receives a chip layout. Next, the system identifies hotspots within the chip layout, wherein a hotspot is a location within the chip layout wherein a yield-indicative variable value falls in a low manufacturable range. The system then obtains yield scores for the hotspots, wherein a yield score indicates a failure probability for a corresponding hotspot. Next, the system predicts the manufacturing yield for the chip based on the hotspots and the yield scores for the hotspots.

摘要翻译： 本发明的一个实施例提供一种预测芯片的制造成品率的系统。 在操作过程中，系统首先接收芯片布局。 接下来，系统识别芯片布局内的热点，其中热点是芯片布局内的位置，其中屈服指示变量值落在低可制造范围内。 然后，系统获得热点的产出分数，其中收益率分数指示相应热点的失败概率。 接下来，该系统基于热点估计芯片的制造成品率以及热点的成品率。