公开(公告)号：US08286121B2

公开(公告)日：2012-10-09

申请号：US12623027

申请日：2009-11-20

申请人： Xin Wang ,  Charles C. Chiang

发明人： Xin Wang ,  Charles C. Chiang

IPC分类号： G06F11/22 ,  G06F17/50 ,  G06F9/455

CPC分类号： G06F17/505 ,  G06F17/504

摘要： A characterized cell library for EDA tools includes one or more mathematical models for each cell, and one or more preconditioning functions (and/or inverse preconditioning functions) for each mathematical model. Each mathematical model represents a performance parameter (e.g., delay, power consumption, noise) or a preconditioned performance parameter of the cell. The preconditioning functions convert an operating parameter (e.g., input slew, output capacitance) associated with the performance parameter into a preconditioned input variable for the mathematical models. In doing so, the preconditioning functions allow for more accurate modeling of complex data relationships without increasing the complexity (e.g., order and number of coefficients) of the mathematical models. Also, because the cell library can be substantially similar to conventional polynomial-based cell libraries except for the inclusion of preconditioning functions, preconditioning does not significantly increase storage requirements and conventional EDA tools can be readily adapted to use the preconditioned cell library.

摘要翻译： 用于EDA工具的特征化单元库包括用于每个单元的一个或多个数学模型，以及用于每个数学模型的一个或多个预处理函数（和/或反向预处理函数）。 每个数学模型表示单元的性能参数（例如，延迟，功耗，噪声）或预处理的性能参数。 预处理功能将与性能参数相关联的操作参数（例如，输入转换，输出电容）转换为用于数学模型的预条件输入变量。 在这样做时，预处理功能允许复杂数据关系的更准确的建模，而不增加数学模型的复杂性（例如，系数的顺序和数量）。 另外，由于除了包含预处理功能之外，细胞库可以基本上类似于常规的基于多项式的细胞库，所以预处理不会显着增加存储要求，并且常规EDA工具可以容易地适应于使用预处理细胞库。

公开(公告)号：US07594213B2

公开(公告)日：2009-09-22

申请号：US10997396

申请日：2004-11-24

申请人： Xin Wang ,  Charles C. Chiang ,  Jamil Kawa

发明人： Xin Wang ,  Charles C. Chiang ,  Jamil Kawa

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/12 ,  Y02P90/265

摘要： One embodiment of the present invention provides a system that computes dummy feature density for a CMP (Chemical-Mechanical Polishing) process. Note that the dummy feature density is used to add dummy features to a layout to reduce the post-CMP topography variation. During operation, the system discretizes a layout of an integrated circuit into a plurality of panels. Next, the system computes a feature density and a slack density for the plurality of panels. The system then computes a dummy feature density for the plurality of panels by, iteratively, (a) calculating an effective feature density for the plurality of panels using the feature density and a function that models the CMP process, (b) calculating a filling amount for a set of panels in the plurality of panels using a target feature density, the effective feature density, and the slack density, and (c) updating the feature density, the slack density, and the dummy feature density for the set of panels using the filling amount. In one embodiment of the present invention, the iterative process is guided by a variance-minimizing heuristic to efficiently select the set of panels and assign/remove dummy density to the set of panels to decrease the effective feature density variation.

摘要翻译： 本发明的一个实施例提供了一种计算CMP（化学机械抛光）工艺的虚拟特征密度的系统。 请注意，虚拟特征密度用于向布局添加虚拟特征以减少CMP后的拓扑变化。 在操作期间，系统将集成电路的布局离散到多个面板中。 接下来，系统计算多个面板的特征密度和松弛密度。 然后，系统通过迭代地计算多个面板的虚拟特征密度，（a）使用特征密度计算多个面板的有效特征密度，以及对CMP过程建模的功能，（b）计算填充量 对于使用目标特征密度，有效特征密度和松弛密度的多个面板中的一组面板，以及（c）更新该组面板的特征密度，松弛密度和虚拟特征密度，使用 填充量。 在本发明的一个实施例中，迭代过程由方差最小化启发式引导，以有效地选择面板集合并且将虚空密度分配/去除到该组面板以减小有效特征密度变化。

公开(公告)号：US20090150850A1

公开(公告)日：2009-06-11

申请号：US12388454

申请日：2009-02-18

申请人： Subarnarekha Sinha ,  Charles C. Chiang

发明人： Subarnarekha Sinha ,  Charles C. Chiang

IPC分类号： G06F17/50

CPC分类号： G03F1/30

摘要： One embodiment of the present invention provides a system that identifies a substantially minimal set of phase conflicts in a PSM-layout that when corrected renders the layout phase-assignable. During operation, the system constructs a phase-conflict graph from a PSM-layout. Next, the system removes a first set of edges from the phase-conflict graph to make the graph planar, and then removes a second set of edges to make the graph bipartite. The system then adds zero or more edges of the first set of edges, and determines a set of phase conflicts in the PSM-layout based on the remaining edges in the first set of edges and the second set of edges. Next, the system identifies a set of lines in the layout, such that adding space along the set of lines results in a phase-assignable PSM-layout.

摘要翻译： 本发明的一个实施例提供了一种系统，其识别PSM布局中的基本上最小的相位冲突集合，其在被校正时呈现布局相位可分配。 在操作期间，系统从PSM布局构建相冲突图。 接下来，系统从相冲突图中移除第一组边，使图形平面，然后移除第二组边，使图形成二分。 然后，系统添加第一组边缘的零个或多个边缘，并且基于第一组边缘和第二组边缘中的剩余边缘来确定PSM布局中的一组相位冲突。 接下来，系统识别布局中的一组线，使得沿着该组线添加空间导致相位可分配的PSM布局。

公开(公告)号：US20090138835A1

公开(公告)日：2009-05-28

申请号：US12362721

申请日：2009-01-30

申请人： Subarnarekha Sinha ,  Hailong Yao ,  Charles C. Chiang

发明人： Subarnarekha Sinha ,  Hailong Yao ,  Charles C. Chiang

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/12 ,  Y02P90/265

摘要： A range pattern is matched to a block of an IC layout by slicing the layout block and the range pattern, followed by comparing a sequence of widths of layout slices to a sequence of width ranges of pattern slices and if the width of any layout slice falls outside the width range of a corresponding pattern slice then the layout block does not match the range pattern. If the comparison succeeds, further comparisons are made between a sequence of lengths of layout fragments in each layout slice and a sequence of length ranges of pattern fragments in corresponding pattern slices. If the length of any layout fragment falls outside the length range of a corresponding pattern fragment then the block does not match the range pattern. If all lengths are within their respective ranges, then the block matches the pattern, although additional constraints are checked in some embodiments.

摘要翻译： 范围模式通过对布局块和范围模式进行切片来匹配IC布局块，然后将布局片段的宽度序列与模式片段的宽度范围序列进行比较，如果任何布局片段的宽度下降 在对应的图案切片的宽度范围之外，则布局块与范围图案不匹配。 如果比较成功，则在每个布局切片中的布局片段的长度序列和相应图案片段中的片段片段的长度范围的序列之间进行进一步的比较。 如果任何布局片段的长度落在相应图案片段的长度范围之外，则该块与范围模式不匹配。 如果所有长度在其各自的范围内，则块在匹配模式时，尽管在一些实施例中检查了附加的约束。

公开(公告)号：US20090106725A1

公开(公告)日：2009-04-23

申请号：US12343958

申请日：2008-12-24

申请人： Xin Wang ,  Charles C. Chiang ,  Jamil Kawa

发明人： Xin Wang ,  Charles C. Chiang ,  Jamil Kawa

IPC分类号： G06F19/00

CPC分类号： G06F17/5068 ,  G06F2217/12 ,  Y02P90/265

摘要： One embodiment of the present invention provides a system that computes dummy feature density for a CMP (Chemical-Mechanical Polishing) process. Note that the dummy feature density is used to add dummy features to a layout to reduce the post-CMP topography variation. During operation, the system discretizes a layout of an integrated circuit into a plurality of panels. Next, the system computes a feature density and a slack density for the plurality of panels. The system then computes a dummy feature density for the plurality of panels by, iteratively, (a) calculating an effective feature density for the plurality of panels using the feature density and a function that models the CMP process, (b) calculating a filling amount for a set of panels in the plurality of panels using a target feature density, the effective feature density, and the slack density, and (c) updating the feature density, the slack density, and the dummy feature density for the set of panels using the filling amount. In one embodiment of the present invention, the iterative process is guided by a variance-minimizing heuristic to efficiently select the set of panels and assign/remove dummy density to the set of panels to decrease the effective feature density variation.

摘要翻译： 本发明的一个实施例提供了一种计算CMP（化学机械抛光）工艺的虚拟特征密度的系统。 请注意，虚拟特征密度用于向布局添加虚拟特征以减少CMP后的拓扑变化。 在操作期间，系统将集成电路的布局离散成多个面板。 接下来，系统计算多个面板的特征密度和松弛密度。 然后，系统通过迭代地计算多个面板的虚拟特征密度，（a）使用特征密度计算多个面板的有效特征密度，以及对CMP过程建模的功能，（b）计算填充量 对于使用目标特征密度，有效特征密度和松弛密度的多个面板中的一组面板，以及（c）更新该组面板的特征密度，松弛密度和虚拟特征密度，使用 填充量。 在本发明的一个实施例中，迭代过程由方差最小化启发式引导，以有效地选择面板集合并且将虚空密度分配/去除到该组面板以减小有效特征密度变化。

公开(公告)号：US20080148196A1

公开(公告)日：2008-06-19

申请号：US12032313

申请日：2008-02-15

申请人： Qing Su ,  Subarnarekha Sinha ,  Charles C. Chiang

发明人： Qing Su ,  Subarnarekha Sinha ,  Charles C. Chiang

IPC分类号： G06F17/50

CPC分类号： G06F17/5068

摘要： Method and apparatus for approximating the average critical area of a layout or layout region, involving summing, over all the object segments of interest, respective critical area contribution values that are dependent upon particular layout parameters of the objects, each of the contribution values being representative of a plurality of defect sizes, and being defined such that for each defect size in the plurality of defect sizes, and for a particular defect type, the contribution values collectively count all critical areas arising due to the object segments of interest only once.

摘要翻译： 用于近似布局或布局区域的平均临界区域的方法和装置，涉及在感兴趣的所有对象段上求和相应于依赖于对象的特定布局参数的关键区域贡献值，每个贡献值是代表性的 并且被定义为使得对于多个缺陷尺寸中的每个缺陷尺寸，并且对于特定缺陷类型，贡献值集合地计数由于感兴趣的对象片段而产生的所有关键区域一次。

公开(公告)号：US07346865B2

公开(公告)日：2008-03-18

申请号：US10978946

申请日：2004-11-01

申请人： Qing Su ,  Subarnarekha Sinha ,  Charles C. Chiang

发明人： Qing Su ,  Subarnarekha Sinha ,  Charles C. Chiang

IPC分类号： G06F17/50

CPC分类号： G06F17/5068

摘要： Method and apparatus for approximating the average critical area of a layout or layout region, involving summing, over all the object segments of interest, respective critical area contribution values that are dependent upon particular layout parameters of the objects, each of the contribution values being representative of a plurality of defect sizes, and being defined such that for each defect size in the plurality of defect sizes, and for a particular defect type, the contribution values collectively count all critical areas arising due to the object segments of interest only once.

摘要翻译： 用于近似布局或布局区域的平均临界区域的方法和装置，涉及在感兴趣的所有对象段上求和相应于依赖于对象的特定布局参数的关键区域贡献值，每个贡献值是代表性的 并且被定义为使得对于多个缺陷尺寸中的每个缺陷尺寸，并且对于特定缺陷类型，贡献值集合地计数由于感兴趣的对象片段而产生的所有关键区域一次。

公开(公告)号：US08490030B1

公开(公告)日：2013-07-16

申请号：US13487047

申请日：2012-06-01

申请人： Charles C. Chiang ,  Jing Guo ,  Fan Yang ,  Subarnarekha Sinha ,  Xuan Zeng

发明人： Charles C. Chiang ,  Jing Guo ,  Fan Yang ,  Subarnarekha Sinha ,  Xuan Zeng

IPC分类号： G06F17/50

CPC分类号： G06F17/50 ,  G06F17/5081

摘要： An dual function distance metric for pattern matching based hotspot clustering is described. The dual function distance metric can handle patterns containing multiple polygons, is easy to compute, and is tolerant of small variations or shifts of the shapes. Compared with an XOR distance metric pattern clustering, the dual function distance metric can achieve up to 37.5% accuracy improvement with 2X-4X computational cost in the context of cluster analysis. The dual function distance metric is reliable and accurate for characterizing clips (e.g. hotspots), thereby making it desirable for industry applications.

摘要翻译： 描述了基于模式匹配的热点聚类的双功能距离度量。 双功能距离度量可以处理包含多个多边形的图案，易于计算，并且容忍形状的小变化或偏移。 与XOR距离度量模式聚类相比，双重功能距离度量可以在聚类分析的上下文中使用2X-4X计算成本实现高达37.5％的精度提高。 双功能距离度量对于表征剪辑（例如热点）是可靠和准确的，从而使其对于工业应用是理想的。

公开(公告)号：US08452075B2

公开(公告)日：2013-05-28

申请号：US11786683

申请日：2007-04-11

申请人： Jingyu Xu ,  Subarnarekha Sinha ,  Charles C. Chiang

发明人： Jingyu Xu ,  Subarnarekha Sinha ,  Charles C. Chiang

IPC分类号： G06K9/00

CPC分类号： G06K9/469 ,  G06K2209/19 ,  G06T7/0006 ,  G06T7/12 ,  G06T2207/30141

摘要： One embodiment of the present invention provides a system that identifies hotspot areas in a layout. The system receives the layout and a via range pattern which indicates one or more vias and performs range-pattern matching (RPM) on the layout based on a via-free range pattern derived from the via range pattern. The system further identifies at least one candidate area and determines whether via(s) in the candidate area matches the via(s) in the via range pattern. The system can also receives a range pattern with don't care regions. The system determines a core pattern from the range pattern, performs RPM based on the core pattern, and identifies a candidate area. The system then determines whether areas surrounding the candidate area match a non-core effective pattern of the range pattern. The system further determines if the areas surrounding the candidate area satisfy the constraints associated with any vias and the don't care regions.

摘要翻译： 本发明的一个实施例提供一种识别布局中的热点区域的系统。 系统接收布局和指示一个或多个通孔的通孔范围图案，并且基于从通孔范围图案导出的无通孔范围图案在布局上执行范围图案匹配（RPM）。 系统还识别至少一个候选区域并确定候选区域中的通路是否与通孔范围图案中的通孔匹配。 系统也可以接收范围模式与不关心的区域。 系统从范围模式确定核心模式，基于核心模式执行RPM，并识别候选区域。 然后，系统确定候选区域周围的区域是否匹配范围模式的非核心有效模式。 系统还确定候选区域周围的区域是否满足与任何通孔和无关区域相关联的限制。

公开(公告)号：US08209639B2

公开(公告)日：2012-06-26

申请号：US12362721

申请日：2009-01-30

申请人： Subarnarekha Sinha ,  Hailong Yao ,  Charles C. Chiang

发明人： Subarnarekha Sinha ,  Hailong Yao ,  Charles C. Chiang

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/12 ,  Y02P90/265

摘要： A range pattern is matched to a block of an IC layout by slicing the layout block and the range pattern, followed by comparing a sequence of widths of layout slices to a sequence of width ranges of pattern slices and if the width of any layout slice falls outside the width range of a corresponding pattern slice then the layout block does not match the range pattern. If the comparison succeeds, further comparisons are made between a sequence of lengths of layout fragments in each layout slice and a sequence of length ranges of pattern fragments in corresponding pattern slices. If the length of any layout fragment falls outside the length range of a corresponding pattern fragment then the block does not match the range pattern. If all lengths are within their respective ranges, then the block matches the pattern, although additional constraints are checked in some embodiments.

摘要翻译： 范围模式通过对布局块和范围模式进行切片来匹配IC布局块，然后将布局片段的宽度序列与模式片段的宽度范围序列进行比较，如果任何布局片段的宽度下降 在对应的图案切片的宽度范围之外，则布局块与范围图案不匹配。 如果比较成功，则在每个布局切片中的布局片段的长度序列和相应图案片段中的片段片段的长度范围的序列之间进行进一步的比较。 如果任何布局片段的长度落在相应图案片段的长度范围之外，则该块与范围模式不匹配。 如果所有长度在其各自的范围内，则块在匹配模式时，尽管在一些实施例中检查了附加的约束。