公开(公告)号：US10289588B2

公开(公告)日：2019-05-14

申请号：US15199504

申请日：2016-06-30

Applicant: Quanta Computer Inc.

Inventor： Wei-Yi Chu ,  Chia-Feng Cheng ,  Kai Chang ,  Chih-Yu Chen

IPC: G06F13/40 ,  G06F13/16 ,  G06F3/06

Abstract: An apparatus having a first interface of a first type supporting a plurality of data ports, a second interface of a second type supporting at least a portion of the plurality data ports, and a third interface of the second type. The apparatus also including a switching module coupled to a control port of the first interface and configured for selectably coupling the plurality of data ports to at least one of the second interface and the third interface based on a signal at the control port.

公开(公告)号：US10210121B2

公开(公告)日：2019-02-19

申请号：US15007753

申请日：2016-01-27

Applicant: Quanta Computer Inc.

Inventor： Wei-Yi Chu ,  Chia-Feng Cheng ,  Kai Chang ,  Chih-Yu Chen

IPC: G06F13/42 ,  G06F13/40 ,  G06F12/02 ,  G06F13/28

Abstract: A system for switching between a high performance mode and dual path mode is disclosed. The system includes a first device, a second device, a third device, and a switch configured to receive control signals, and in response causing the switch to selectively couple one or more first lanes of the first device or one or more second lanes of the second device to third lanes of the third device to yield enabled lanes. The system also include a number of the enabled lanes is less than or equal to a number of the third lanes, and the switch is configured to route the enabled lanes associated with the first device to a first portion of the third lanes in an increasing order and to route the enabled lanes associated with the second device to a second portion of the third lanes in a decreasing order.