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公开(公告)号：US20210226638A1
公开(公告)日：2021-07-22
申请号：US16749295
申请日：2020-01-22
Applicant: RAYTHEON COMPANY
Inventor： Richard E. Wahl , Joshua J. Cantrell , John L. Vampola , Micky R. Harris
Abstract: An analog counter circuit for use with a digital pixel includes: an input; an output; a first stage electrically coupled to the input that is charged to an initial charge voltage; a second stage that includes an accumulating charge storage device; and a charge transfer device between the first and second stages that includes a transfer voltage. The charge transfer device allows charge from the first stage to pass to the second stage and be accumulated on the accumulating charge storage device as long as a voltage at a node in the first stage is greater than the transfer voltage.
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公开(公告)号：US20210226637A1
公开(公告)日：2021-07-22
申请号：US16749223
申请日：2020-01-22
Applicant: RAYTHEON COMPANY
Inventor： Richard E. Wahl
Abstract: An analog counter circuit for use with a digital pixel includes an input; an output; a first inverter connected to the input that produces on a first inverter output a time delayed inverted signal (RP*) from an input signal received at the input; a second inverter connected to the first inverter output that produces a time delayed signal (RP) at a second inverter output from the input signal and that is delayed relative to RP* and a control switch connected between a source voltage and a floating node. The control switch is controlled by the signal RP* on the first inverter output. The analog counter also includes a feedback capacitor connected between the second inverter output and the floating node; an accumulating capacitor that accumulates at least some of a charge that passes through the control switch; and an injection switch connected between the control switch and the accumulating capacitor.
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公开(公告)号：US11476855B2
公开(公告)日：2022-10-18
申请号：US16749223
申请日：2020-01-22
Applicant: RAYTHEON COMPANY
Inventor： Richard E. Wahl
Abstract: An analog counter circuit for use with a digital pixel includes an input; an output; a first inverter connected to the input that produces on a first inverter output a time delayed inverted signal (RP*) from an input signal received at the input; a second inverter connected to the first inverter output that produces a time delayed signal (RP) at a second inverter output from the input signal and that is delayed relative to RP* and a control switch connected between a source voltage and a floating node. The control switch is controlled by the signal RP* on the first inverter output. The analog counter also includes a feedback capacitor connected between the second inverter output and the floating node; an accumulating capacitor that accumulates at least some of a charge that passes through the control switch; and an injection switch connected between the control switch and the accumulating capacitor.
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公开(公告)号：US11456746B2
公开(公告)日：2022-09-27
申请号：US16749295
申请日：2020-01-22
Applicant: RAYTHEON COMPANY
Inventor： Richard E. Wahl , Joshua J. Cantrell , John L. Vampola , Micky R. Harris
Abstract: An analog counter circuit for use with a digital pixel includes: an input; an output; a first stage electrically coupled to the input that is charged to an initial charge voltage; a second stage that includes an accumulating charge storage device; and a charge transfer device between the first and second stages that includes a transfer voltage. The charge transfer device allows charge from the first stage to pass to the second stage and be accumulated on the accumulating charge storage device as long as a voltage at a node in the first stage is greater than the transfer voltage.
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