Abstract:
A feedback circuit between the output and input terminals of a complementary-symmetry, metal-oxide-semiconductor (CMOS) circuit, such as an inverter circuit, quiescently biases the circuit at a point on its transfer characteristic such that a slight additional change in voltage level will cause the circuit to change state. Input signal is applied to the input terminal through a coupling element such as a capacitor. When this input signal starts to decrease after reaching its peak voltage value in a given sense, it causes the feedback circuit to open and the CMOS circuit to change to its second state. In response to each following peak of the same sense, the feedback loop momentarily closes then opens and concurrently the circuit momentarily reverts to its initial state then switches to its second state.
Abstract:
The circuits include a complementary inverter, comprised of first and second transistors responsive to an input signal, and means responsive to the input signal, for placing the conduction paths of additional transistors in parallel with the conduction path of the first or the second transistor. The conductivity of the additional transistors is controlled by a feedback signal derived from the output of the inverter. When an inverter transistor is turned on the additional transistors connected across it are also turned on causing the equivalent impedance of the ''''ON'''' portion of the circuit to be much lower than the ''''ON'''' impedance of either one of the inverter transistors.