公开(公告)号：US12032020B2

公开(公告)日：2024-07-09

申请号：US18069479

申请日：2022-12-21

申请人： REALTEK SEMICONDUCTOR CORPORATION

发明人： Chun-Yi Kuo ,  Ying-Yen Chen ,  Hsiao Tzu Liu

IPC分类号： G01R31/28 ,  G01R31/3185

CPC分类号： G01R31/318552 ,  G01R31/318541

摘要： The present application discloses a calibration data generation circuit and an associated method. The calibration data generation circuit includes: a first delay unit, having a first delay amount; and a first scan path, including: a first scan flip-flop, including: a scan data input terminal; a clock input terminal, arranged for receiving a clock signal; and an output terminal; and a second scan flip-flop, including: a scan data input terminal, coupled to the output terminal of the first scan flip-flop; a clock input terminal, arranged for receiving a delayed clock signal formed by the clock signal passing through the first delay unit; and an output terminal; wherein when the calibration data generation circuit operates, the first scan flip-flop and the second scan flip-flop are configured in a scan shift mode.