公开(公告)号：US20240178847A1

公开(公告)日：2024-05-30

申请号：US18510710

申请日：2023-11-16

申请人： REALTEK SEMICONDUCTOR CORPORATION

发明人： MING-JHE DU ,  Ming-Hsuan Tsai ,  Chun-I Yeh ,  Yu-Chong Yen

IPC分类号： H03L7/083 ,  H03L7/089 ,  H03L7/091

CPC分类号： H03L7/083 ,  H03L7/089 ,  H03L7/091

摘要： The present disclosure discloses a media communication apparatus having built-in signal synchronization mechanism. A local clock generation circuit generates a reference clock signal and a media clock signal. A time calibration circuit performs time calibration process with an external apparatus to generate time calibration information to further calibrate the reference clock signal and the media clock signal accordingly to generate a calibrated reference clock signal and a calibrated media clock signal on a standard time domain. A media clock processing circuit generates a sampling signal according to the calibrated media clock signal. A signal processing circuit generates time related information according to the calibrated reference clock signal to process an input media signal according to the time related information and the sampling signal and generate an output media signal.