公开(公告)号：US20150214356A1

公开(公告)日：2015-07-30

申请号：US14605027

申请日：2015-01-26

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kosuke YOSHIDA ,  Tetsuya NITTA

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/10 ,  H01L29/06

CPC classification number: H01L29/7813 ,  H01L27/0922 ,  H01L29/063 ,  H01L29/0634 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/66734 ,  H01L29/7809

Abstract: To provide a semiconductor device capable of suppressing a reduction in breakdown voltage by suppressing a change in dimensions of a double RESURF structure, and a method of manufacturing the same.In the semiconductor device, an upper RESURF region is formed so as to contact with a first buried region on a side of the one main surface within a semiconductor substrate. The semiconductor substrate has a field oxide formed so as to reach the upper RESURF region on the one main surface. The semiconductor substrate includes a second conductivity type body region formed so as to contact with the upper RESURF region on a side of the one main surface and so as to neighbor the field oxide within the semiconductor substrate.

Abstract translation: 为了提供能够通过抑制双重RESURF结构的尺寸变化来抑制击穿电压降低的半导体器件及其制造方法。 在半导体器件中，上部RESURF区域形成为与半导体衬底内的一个主表面侧的第一掩埋区域接触。 半导体衬底具有形成为在一个主表面上到达上RESURF区域的场氧化物。 半导体衬底包括形成为与一个主表面侧上部RESURF区接触并与半导体衬底内的场氧化物相邻的第二导电类型体区。